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| author | Subhash Jadavani <subhashj@codeaurora.org> | 2013-05-14 17:46:43 +0530 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-27 10:28:39 -0700 |
| commit | cecd05aeb2f39469e505a61235a9e566f1a32a42 (patch) | |
| tree | d6b4fec5f3dbfb92bf31113501b62adb8437d9f7 /include/linux/patchkey.h | |
| parent | f957bdbd793ed262bf43a2a3059ff75f17b89c83 (diff) | |
mmc: sdhci-msm: fix issue with power irq
SDCC controller reset (SW_RST) during probe may trigger power irq if
previous status of PWRCTL was either BUS_ON or IO_HIGH_V. So before we
enable the power irq interrupt in GIC (by registering the interrupt
handler), we need to ensure that any pending power irq interrupt status
is acknowledged otherwise power irq interrupt handler would be fired
prematurely.
CRs-Fixed: 487962
Change-Id: If4693869210bc8b361dadb2b68a47b6ac8707e0f
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'include/linux/patchkey.h')
0 files changed, 0 insertions, 0 deletions