diff options
| author | Santosh Rastapur <santosh@chelsio.com> | 2013-03-14 05:08:51 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-03-14 11:35:54 -0400 |
| commit | 22adfe0a85ca3808e09e7b4787cb08299d89aeaa (patch) | |
| tree | fd9c1b4a122c91c69f7038f2956f9d741a8959e1 /include/linux/moduleloader.h | |
| parent | 251f9e88a2c1e61071bd0eefa0f5f2e1ebc3fcff (diff) | |
cxgb4: Add T5 write combining support
This patch implements a low latency Write Combining (aka Write Coalescing) work
request path. PCIE maps User Space Doorbell BAR2 region writes to the new
interface to SGE. SGE pulls a new message from PCIE new interface and if its a
coalesced write work request then pushes it for processing. This patch copies
coalesced work request to memory mapped BAR2 space.
Signed-off-by: Santosh Rastapur <santosh@chelsio.com>
Signed-off-by: Vipul Pandya <vipul@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/moduleloader.h')
0 files changed, 0 insertions, 0 deletions