Merge tag 'regulator-v3.15' into regulator-linus

regulator: Updates for v3.15

This release has lots and lots of small cleanups and fixes in the
regulator subsystem, mainly cleaning up some bad patterns that got
duplicated in DT code, but otherwise very little of note outside
of the scope of the relevant drivers:

 - Support for configuration of the initial state for gpio regulators
   with multi-voltage support.
 - Support for calling regulator_set_voltage() on fixed regulators.
 - New drivers for Broadcom BCM590xx, Freescale pfuze200, Samsung S2MPA01 &
   S2MPS11/4, some PWM controlled regulators found on some ST boards and
   TI TPS65218.

# gpg: Signature made Mon 31 Mar 2014 12:29:14 BST using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"

6 files changed, 498 insertions, 15 deletions

diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 41c9bde410c5..157e32b6ca28 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -18,7 +18,9 @@ enum sec_device_type {
 	S5M8751X,
 	S5M8763X,
 	S5M8767X,
+	S2MPA01,
 	S2MPS11X,
+	S2MPS14X,
 };
 
 /**
@@ -50,7 +52,7 @@ struct sec_pmic_dev {
 	struct regmap_irq_chip_data *irq_data;
 
 	int ono;
-	int type;
+	unsigned long type;
 	bool wakeup;
 	bool wtsr_smpl;
 };
@@ -92,7 +94,7 @@ struct sec_platform_data {
 	int				buck3_default_idx;
 	int				buck4_default_idx;
 
-	int                             buck_ramp_delay;
+	int				buck_ramp_delay;
 
 	int				buck2_ramp_delay;
 	int				buck34_ramp_delay;
@@ -100,10 +102,15 @@ struct sec_platform_data {
 	int				buck16_ramp_delay;
 	int				buck7810_ramp_delay;
 	int				buck9_ramp_delay;
-
-	bool                            buck2_ramp_enable;
-	bool                            buck3_ramp_enable;
-	bool                            buck4_ramp_enable;
+	int				buck24_ramp_delay;
+	int				buck3_ramp_delay;
+	int				buck7_ramp_delay;
+	int				buck8910_ramp_delay;
+
+	bool				buck1_ramp_enable;
+	bool				buck2_ramp_enable;
+	bool				buck3_ramp_enable;
+	bool				buck4_ramp_enable;
 	bool				buck6_ramp_enable;
 
 	int				buck2_init;
@@ -119,7 +126,8 @@ struct sec_platform_data {
 struct sec_regulator_data {
 	int				id;
 	struct regulator_init_data	*initdata;
-	struct device_node *reg_node;
+	struct device_node		*reg_node;
+	int				ext_control_gpio;
 };
 
 /*
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index d43b4f9e7fb2..1224f447356b 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -13,6 +13,56 @@
 #ifndef __LINUX_MFD_SEC_IRQ_H
 #define __LINUX_MFD_SEC_IRQ_H
 
+enum s2mpa01_irq {
+	S2MPA01_IRQ_PWRONF,
+	S2MPA01_IRQ_PWRONR,
+	S2MPA01_IRQ_JIGONBF,
+	S2MPA01_IRQ_JIGONBR,
+	S2MPA01_IRQ_ACOKBF,
+	S2MPA01_IRQ_ACOKBR,
+	S2MPA01_IRQ_PWRON1S,
+	S2MPA01_IRQ_MRB,
+
+	S2MPA01_IRQ_RTC60S,
+	S2MPA01_IRQ_RTCA1,
+	S2MPA01_IRQ_RTCA0,
+	S2MPA01_IRQ_SMPL,
+	S2MPA01_IRQ_RTC1S,
+	S2MPA01_IRQ_WTSR,
+
+	S2MPA01_IRQ_INT120C,
+	S2MPA01_IRQ_INT140C,
+	S2MPA01_IRQ_LDO3_TSD,
+	S2MPA01_IRQ_B16_TSD,
+	S2MPA01_IRQ_B24_TSD,
+	S2MPA01_IRQ_B35_TSD,
+
+	S2MPA01_IRQ_NR,
+};
+
+#define S2MPA01_IRQ_PWRONF_MASK		(1 << 0)
+#define S2MPA01_IRQ_PWRONR_MASK		(1 << 1)
+#define S2MPA01_IRQ_JIGONBF_MASK	(1 << 2)
+#define S2MPA01_IRQ_JIGONBR_MASK	(1 << 3)
+#define S2MPA01_IRQ_ACOKBF_MASK		(1 << 4)
+#define S2MPA01_IRQ_ACOKBR_MASK		(1 << 5)
+#define S2MPA01_IRQ_PWRON1S_MASK	(1 << 6)
+#define S2MPA01_IRQ_MRB_MASK		(1 << 7)
+
+#define S2MPA01_IRQ_RTC60S_MASK		(1 << 0)
+#define S2MPA01_IRQ_RTCA1_MASK		(1 << 1)
+#define S2MPA01_IRQ_RTCA0_MASK		(1 << 2)
+#define S2MPA01_IRQ_SMPL_MASK		(1 << 3)
+#define S2MPA01_IRQ_RTC1S_MASK		(1 << 4)
+#define S2MPA01_IRQ_WTSR_MASK		(1 << 5)
+
+#define S2MPA01_IRQ_INT120C_MASK	(1 << 0)
+#define S2MPA01_IRQ_INT140C_MASK	(1 << 1)
+#define S2MPA01_IRQ_LDO3_TSD_MASK	(1 << 2)
+#define S2MPA01_IRQ_B16_TSD_MASK	(1 << 3)
+#define S2MPA01_IRQ_B24_TSD_MASK	(1 << 4)
+#define S2MPA01_IRQ_B35_TSD_MASK	(1 << 5)
+
 enum s2mps11_irq {
 	S2MPS11_IRQ_PWRONF,
 	S2MPS11_IRQ_PWRONR,
@@ -24,8 +74,8 @@ enum s2mps11_irq {
 	S2MPS11_IRQ_MRB,
 
 	S2MPS11_IRQ_RTC60S,
+	S2MPS11_IRQ_RTCA0,
 	S2MPS11_IRQ_RTCA1,
-	S2MPS11_IRQ_RTCA2,
 	S2MPS11_IRQ_SMPL,
 	S2MPS11_IRQ_RTC1S,
 	S2MPS11_IRQ_WTSR,
@@ -47,7 +97,7 @@ enum s2mps11_irq {
 
 #define S2MPS11_IRQ_RTC60S_MASK		(1 << 0)
 #define S2MPS11_IRQ_RTCA1_MASK		(1 << 1)
-#define S2MPS11_IRQ_RTCA2_MASK		(1 << 2)
+#define S2MPS11_IRQ_RTCA0_MASK		(1 << 2)
 #define S2MPS11_IRQ_SMPL_MASK		(1 << 3)
 #define S2MPS11_IRQ_RTC1S_MASK		(1 << 4)
 #define S2MPS11_IRQ_WTSR_MASK		(1 << 5)
@@ -55,6 +105,33 @@ enum s2mps11_irq {
 #define S2MPS11_IRQ_INT120C_MASK	(1 << 0)
 #define S2MPS11_IRQ_INT140C_MASK	(1 << 1)
 
+enum s2mps14_irq {
+	S2MPS14_IRQ_PWRONF,
+	S2MPS14_IRQ_PWRONR,
+	S2MPS14_IRQ_JIGONBF,
+	S2MPS14_IRQ_JIGONBR,
+	S2MPS14_IRQ_ACOKBF,
+	S2MPS14_IRQ_ACOKBR,
+	S2MPS14_IRQ_PWRON1S,
+	S2MPS14_IRQ_MRB,
+
+	S2MPS14_IRQ_RTC60S,
+	S2MPS14_IRQ_RTCA1,
+	S2MPS14_IRQ_RTCA0,
+	S2MPS14_IRQ_SMPL,
+	S2MPS14_IRQ_RTC1S,
+	S2MPS14_IRQ_WTSR,
+
+	S2MPS14_IRQ_INT120C,
+	S2MPS14_IRQ_INT140C,
+	S2MPS14_IRQ_TSD,
+
+	S2MPS14_IRQ_NR,
+};
+
+/* Masks for interrupts are the same as in s2mps11 */
+#define S2MPS14_IRQ_TSD_MASK		(1 << 2)
+
 enum s5m8767_irq {
 	S5M8767_IRQ_PWRR,
 	S5M8767_IRQ_PWRF,
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h
index 94b7cd6d8891..3e02b768d537 100644
--- a/include/linux/mfd/samsung/rtc.h
+++ b/include/linux/mfd/samsung/rtc.h
@@ -1,12 +1,17 @@
-/*  rtc.h
+/* rtc.h
  *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd
+ * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd
  *              http://www.samsung.com
  *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
  *
  */
 
@@ -43,6 +48,39 @@ enum sec_rtc_reg {
 	SEC_RTC_STATUS,
 	SEC_WTSR_SMPL_CNTL,
 	SEC_RTC_UDR_CON,
+
+	SEC_RTC_REG_MAX,
+};
+
+enum s2mps_rtc_reg {
+	S2MPS_RTC_CTRL,
+	S2MPS_WTSR_SMPL_CNTL,
+	S2MPS_RTC_UDR_CON,
+	S2MPS_RSVD,
+	S2MPS_RTC_SEC,
+	S2MPS_RTC_MIN,
+	S2MPS_RTC_HOUR,
+	S2MPS_RTC_WEEKDAY,
+	S2MPS_RTC_DATE,
+	S2MPS_RTC_MONTH,
+	S2MPS_RTC_YEAR,
+	S2MPS_ALARM0_SEC,
+	S2MPS_ALARM0_MIN,
+	S2MPS_ALARM0_HOUR,
+	S2MPS_ALARM0_WEEKDAY,
+	S2MPS_ALARM0_DATE,
+	S2MPS_ALARM0_MONTH,
+	S2MPS_ALARM0_YEAR,
+	S2MPS_ALARM1_SEC,
+	S2MPS_ALARM1_MIN,
+	S2MPS_ALARM1_HOUR,
+	S2MPS_ALARM1_WEEKDAY,
+	S2MPS_ALARM1_DATE,
+	S2MPS_ALARM1_MONTH,
+	S2MPS_ALARM1_YEAR,
+	S2MPS_OFFSRC,
+
+	S2MPS_RTC_REG_MAX,
 };
 
 #define RTC_I2C_ADDR		(0x0C >> 1)
@@ -54,6 +92,9 @@ enum sec_rtc_reg {
 #define ALARM1_STATUS		(1 << 2)
 #define UPDATE_AD		(1 << 0)
 
+#define S2MPS_ALARM0_STATUS	(1 << 2)
+#define S2MPS_ALARM1_STATUS	(1 << 1)
+
 /* RTC Control Register */
 #define BCD_EN_SHIFT		0
 #define BCD_EN_MASK		(1 << BCD_EN_SHIFT)
@@ -62,6 +103,10 @@ enum sec_rtc_reg {
 /* RTC Update Register1 */
 #define RTC_UDR_SHIFT		0
 #define RTC_UDR_MASK		(1 << RTC_UDR_SHIFT)
+#define S2MPS_RTC_WUDR_SHIFT	4
+#define S2MPS_RTC_WUDR_MASK	(1 << S2MPS_RTC_WUDR_SHIFT)
+#define S2MPS_RTC_RUDR_SHIFT	0
+#define S2MPS_RTC_RUDR_MASK	(1 << S2MPS_RTC_RUDR_SHIFT)
 #define RTC_TCON_SHIFT		1
 #define RTC_TCON_MASK		(1 << RTC_TCON_SHIFT)
 #define RTC_TIME_EN_SHIFT	3
diff --git a/include/linux/mfd/samsung/s2mpa01.h b/include/linux/mfd/samsung/s2mpa01.h
new file mode 100644
index 000000000000..fbc63bc0d6a2
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mpa01.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ *		http://www.samsung.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#ifndef __LINUX_MFD_S2MPA01_H
+#define __LINUX_MFD_S2MPA01_H
+
+/* S2MPA01 registers */
+enum s2mpa01_reg {
+	S2MPA01_REG_ID,
+	S2MPA01_REG_INT1,
+	S2MPA01_REG_INT2,
+	S2MPA01_REG_INT3,
+	S2MPA01_REG_INT1M,
+	S2MPA01_REG_INT2M,
+	S2MPA01_REG_INT3M,
+	S2MPA01_REG_ST1,
+	S2MPA01_REG_ST2,
+	S2MPA01_REG_PWRONSRC,
+	S2MPA01_REG_OFFSRC,
+	S2MPA01_REG_RTC_BUF,
+	S2MPA01_REG_CTRL1,
+	S2MPA01_REG_ETC_TEST,
+	S2MPA01_REG_RSVD1,
+	S2MPA01_REG_BU_CHG,
+	S2MPA01_REG_RAMP1,
+	S2MPA01_REG_RAMP2,
+	S2MPA01_REG_LDO_DSCH1,
+	S2MPA01_REG_LDO_DSCH2,
+	S2MPA01_REG_LDO_DSCH3,
+	S2MPA01_REG_LDO_DSCH4,
+	S2MPA01_REG_OTP_ADRL,
+	S2MPA01_REG_OTP_ADRH,
+	S2MPA01_REG_OTP_DATA,
+	S2MPA01_REG_MON1SEL,
+	S2MPA01_REG_MON2SEL,
+	S2MPA01_REG_LEE,
+	S2MPA01_REG_RSVD2,
+	S2MPA01_REG_RSVD3,
+	S2MPA01_REG_RSVD4,
+	S2MPA01_REG_RSVD5,
+	S2MPA01_REG_RSVD6,
+	S2MPA01_REG_TOP_RSVD,
+	S2MPA01_REG_DVS_SEL,
+	S2MPA01_REG_DVS_PTR,
+	S2MPA01_REG_DVS_DATA,
+	S2MPA01_REG_RSVD_NO,
+	S2MPA01_REG_UVLO,
+	S2MPA01_REG_LEE_NO,
+	S2MPA01_REG_B1CTRL1,
+	S2MPA01_REG_B1CTRL2,
+	S2MPA01_REG_B2CTRL1,
+	S2MPA01_REG_B2CTRL2,
+	S2MPA01_REG_B3CTRL1,
+	S2MPA01_REG_B3CTRL2,
+	S2MPA01_REG_B4CTRL1,
+	S2MPA01_REG_B4CTRL2,
+	S2MPA01_REG_B5CTRL1,
+	S2MPA01_REG_B5CTRL2,
+	S2MPA01_REG_B5CTRL3,
+	S2MPA01_REG_B5CTRL4,
+	S2MPA01_REG_B5CTRL5,
+	S2MPA01_REG_B5CTRL6,
+	S2MPA01_REG_B6CTRL1,
+	S2MPA01_REG_B6CTRL2,
+	S2MPA01_REG_B7CTRL1,
+	S2MPA01_REG_B7CTRL2,
+	S2MPA01_REG_B8CTRL1,
+	S2MPA01_REG_B8CTRL2,
+	S2MPA01_REG_B9CTRL1,
+	S2MPA01_REG_B9CTRL2,
+	S2MPA01_REG_B10CTRL1,
+	S2MPA01_REG_B10CTRL2,
+	S2MPA01_REG_L1CTRL,
+	S2MPA01_REG_L2CTRL,
+	S2MPA01_REG_L3CTRL,
+	S2MPA01_REG_L4CTRL,
+	S2MPA01_REG_L5CTRL,
+	S2MPA01_REG_L6CTRL,
+	S2MPA01_REG_L7CTRL,
+	S2MPA01_REG_L8CTRL,
+	S2MPA01_REG_L9CTRL,
+	S2MPA01_REG_L10CTRL,
+	S2MPA01_REG_L11CTRL,
+	S2MPA01_REG_L12CTRL,
+	S2MPA01_REG_L13CTRL,
+	S2MPA01_REG_L14CTRL,
+	S2MPA01_REG_L15CTRL,
+	S2MPA01_REG_L16CTRL,
+	S2MPA01_REG_L17CTRL,
+	S2MPA01_REG_L18CTRL,
+	S2MPA01_REG_L19CTRL,
+	S2MPA01_REG_L20CTRL,
+	S2MPA01_REG_L21CTRL,
+	S2MPA01_REG_L22CTRL,
+	S2MPA01_REG_L23CTRL,
+	S2MPA01_REG_L24CTRL,
+	S2MPA01_REG_L25CTRL,
+	S2MPA01_REG_L26CTRL,
+
+	S2MPA01_REG_LDO_OVCB1,
+	S2MPA01_REG_LDO_OVCB2,
+	S2MPA01_REG_LDO_OVCB3,
+	S2MPA01_REG_LDO_OVCB4,
+
+};
+
+/* S2MPA01 regulator ids */
+enum s2mpa01_regulators {
+	S2MPA01_LDO1,
+	S2MPA01_LDO2,
+	S2MPA01_LDO3,
+	S2MPA01_LDO4,
+	S2MPA01_LDO5,
+	S2MPA01_LDO6,
+	S2MPA01_LDO7,
+	S2MPA01_LDO8,
+	S2MPA01_LDO9,
+	S2MPA01_LDO10,
+	S2MPA01_LDO11,
+	S2MPA01_LDO12,
+	S2MPA01_LDO13,
+	S2MPA01_LDO14,
+	S2MPA01_LDO15,
+	S2MPA01_LDO16,
+	S2MPA01_LDO17,
+	S2MPA01_LDO18,
+	S2MPA01_LDO19,
+	S2MPA01_LDO20,
+	S2MPA01_LDO21,
+	S2MPA01_LDO22,
+	S2MPA01_LDO23,
+	S2MPA01_LDO24,
+	S2MPA01_LDO25,
+	S2MPA01_LDO26,
+
+	S2MPA01_BUCK1,
+	S2MPA01_BUCK2,
+	S2MPA01_BUCK3,
+	S2MPA01_BUCK4,
+	S2MPA01_BUCK5,
+	S2MPA01_BUCK6,
+	S2MPA01_BUCK7,
+	S2MPA01_BUCK8,
+	S2MPA01_BUCK9,
+	S2MPA01_BUCK10,
+
+	S2MPA01_REGULATOR_MAX,
+};
+
+#define S2MPA01_BUCK_MIN1	600000
+#define S2MPA01_BUCK_MIN2	800000
+#define S2MPA01_BUCK_MIN3	1000000
+#define S2MPA01_BUCK_MIN4	1500000
+#define S2MPA01_LDO_MIN		800000
+
+#define S2MPA01_BUCK_STEP1	6250
+#define S2MPA01_BUCK_STEP2	12500
+
+#define S2MPA01_LDO_STEP1	50000
+#define S2MPA01_LDO_STEP2	25000
+
+#define S2MPA01_LDO_VSEL_MASK	0x3F
+#define S2MPA01_BUCK_VSEL_MASK	0xFF
+#define S2MPA01_ENABLE_MASK	(0x03 << S2MPA01_ENABLE_SHIFT)
+#define S2MPA01_ENABLE_SHIFT	0x06
+#define S2MPA01_LDO_N_VOLTAGES	(S2MPA01_LDO_VSEL_MASK + 1)
+#define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1)
+
+#define S2MPA01_RAMP_DELAY	12500	/* uV/us */
+
+#define S2MPA01_BUCK16_RAMP_SHIFT	4
+#define S2MPA01_BUCK24_RAMP_SHIFT	6
+#define S2MPA01_BUCK3_RAMP_SHIFT	4
+#define S2MPA01_BUCK5_RAMP_SHIFT	6
+#define S2MPA01_BUCK7_RAMP_SHIFT	2
+#define S2MPA01_BUCK8910_RAMP_SHIFT	0
+
+#define S2MPA01_BUCK1_RAMP_EN_SHIFT	3
+#define S2MPA01_BUCK2_RAMP_EN_SHIFT	2
+#define S2MPA01_BUCK3_RAMP_EN_SHIFT	1
+#define S2MPA01_BUCK4_RAMP_EN_SHIFT	0
+#define S2MPA01_PMIC_EN_SHIFT	6
+
+#endif /*__LINUX_MFD_S2MPA01_H */
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h
new file mode 100644
index 000000000000..4b449b8ac548
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -0,0 +1,154 @@
+/*
+ * s2mps14.h
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_MFD_S2MPS14_H
+#define __LINUX_MFD_S2MPS14_H
+
+/* S2MPS14 registers */
+enum s2mps14_reg {
+	S2MPS14_REG_ID,
+	S2MPS14_REG_INT1,
+	S2MPS14_REG_INT2,
+	S2MPS14_REG_INT3,
+	S2MPS14_REG_INT1M,
+	S2MPS14_REG_INT2M,
+	S2MPS14_REG_INT3M,
+	S2MPS14_REG_ST1,
+	S2MPS14_REG_ST2,
+	S2MPS14_REG_PWRONSRC,
+	S2MPS14_REG_OFFSRC,
+	S2MPS14_REG_BU_CHG,
+	S2MPS14_REG_RTCCTRL,
+	S2MPS14_REG_CTRL1,
+	S2MPS14_REG_CTRL2,
+	S2MPS14_REG_RSVD1,
+	S2MPS14_REG_RSVD2,
+	S2MPS14_REG_RSVD3,
+	S2MPS14_REG_RSVD4,
+	S2MPS14_REG_RSVD5,
+	S2MPS14_REG_RSVD6,
+	S2MPS14_REG_CTRL3,
+	S2MPS14_REG_RSVD7,
+	S2MPS14_REG_RSVD8,
+	S2MPS14_REG_WRSTBI,
+	S2MPS14_REG_B1CTRL1,
+	S2MPS14_REG_B1CTRL2,
+	S2MPS14_REG_B2CTRL1,
+	S2MPS14_REG_B2CTRL2,
+	S2MPS14_REG_B3CTRL1,
+	S2MPS14_REG_B3CTRL2,
+	S2MPS14_REG_B4CTRL1,
+	S2MPS14_REG_B4CTRL2,
+	S2MPS14_REG_B5CTRL1,
+	S2MPS14_REG_B5CTRL2,
+	S2MPS14_REG_L1CTRL,
+	S2MPS14_REG_L2CTRL,
+	S2MPS14_REG_L3CTRL,
+	S2MPS14_REG_L4CTRL,
+	S2MPS14_REG_L5CTRL,
+	S2MPS14_REG_L6CTRL,
+	S2MPS14_REG_L7CTRL,
+	S2MPS14_REG_L8CTRL,
+	S2MPS14_REG_L9CTRL,
+	S2MPS14_REG_L10CTRL,
+	S2MPS14_REG_L11CTRL,
+	S2MPS14_REG_L12CTRL,
+	S2MPS14_REG_L13CTRL,
+	S2MPS14_REG_L14CTRL,
+	S2MPS14_REG_L15CTRL,
+	S2MPS14_REG_L16CTRL,
+	S2MPS14_REG_L17CTRL,
+	S2MPS14_REG_L18CTRL,
+	S2MPS14_REG_L19CTRL,
+	S2MPS14_REG_L20CTRL,
+	S2MPS14_REG_L21CTRL,
+	S2MPS14_REG_L22CTRL,
+	S2MPS14_REG_L23CTRL,
+	S2MPS14_REG_L24CTRL,
+	S2MPS14_REG_L25CTRL,
+	S2MPS14_REG_LDODSCH1,
+	S2MPS14_REG_LDODSCH2,
+	S2MPS14_REG_LDODSCH3,
+};
+
+/* S2MPS14 regulator ids */
+enum s2mps14_regulators {
+	S2MPS14_LDO1,
+	S2MPS14_LDO2,
+	S2MPS14_LDO3,
+	S2MPS14_LDO4,
+	S2MPS14_LDO5,
+	S2MPS14_LDO6,
+	S2MPS14_LDO7,
+	S2MPS14_LDO8,
+	S2MPS14_LDO9,
+	S2MPS14_LDO10,
+	S2MPS14_LDO11,
+	S2MPS14_LDO12,
+	S2MPS14_LDO13,
+	S2MPS14_LDO14,
+	S2MPS14_LDO15,
+	S2MPS14_LDO16,
+	S2MPS14_LDO17,
+	S2MPS14_LDO18,
+	S2MPS14_LDO19,
+	S2MPS14_LDO20,
+	S2MPS14_LDO21,
+	S2MPS14_LDO22,
+	S2MPS14_LDO23,
+	S2MPS14_LDO24,
+	S2MPS14_LDO25,
+	S2MPS14_BUCK1,
+	S2MPS14_BUCK2,
+	S2MPS14_BUCK3,
+	S2MPS14_BUCK4,
+	S2MPS14_BUCK5,
+
+	S2MPS14_REGULATOR_MAX,
+};
+
+/* Regulator constraints for BUCKx */
+#define S2MPS14_BUCK1235_MIN_600MV	600000
+#define S2MPS14_BUCK4_MIN_1400MV	1400000
+#define S2MPS14_BUCK1235_STEP_6_25MV	6250
+#define S2MPS14_BUCK4_STEP_12_5MV	12500
+#define S2MPS14_BUCK1235_START_SEL	0x20
+#define S2MPS14_BUCK4_START_SEL		0x40
+/*
+ * Default ramp delay in uv/us. Datasheet says that ramp delay can be
+ * controlled however it does not specify which register is used for that.
+ * Let's assume that default value will be set.
+ */
+#define S2MPS14_BUCK_RAMP_DELAY		12500
+
+/* Regulator constraints for different types of LDOx */
+#define S2MPS14_LDO_MIN_800MV		800000
+#define S2MPS14_LDO_MIN_1800MV		1800000
+#define S2MPS14_LDO_STEP_12_5MV		12500
+#define S2MPS14_LDO_STEP_25MV		25000
+
+#define S2MPS14_LDO_VSEL_MASK		0x3F
+#define S2MPS14_BUCK_VSEL_MASK		0xFF
+#define S2MPS14_ENABLE_MASK		(0x03 << S2MPS14_ENABLE_SHIFT)
+#define S2MPS14_ENABLE_SHIFT		6
+/* On/Off controlled by PWREN */
+#define S2MPS14_ENABLE_SUSPEND		(0x01 << S2MPS14_ENABLE_SHIFT)
+#define S2MPS14_LDO_N_VOLTAGES		(S2MPS14_LDO_VSEL_MASK + 1)
+#define S2MPS14_BUCK_N_VOLTAGES		(S2MPS14_BUCK_VSEL_MASK + 1)
+
+#endif /*  __LINUX_MFD_S2MPS14_H */
diff --git a/include/linux/mfd/samsung/s5m8767.h b/include/linux/mfd/samsung/s5m8767.h
index 2ab0b0f03641..243b58fec33d 100644
--- a/include/linux/mfd/samsung/s5m8767.h
+++ b/include/linux/mfd/samsung/s5m8767.h
@@ -183,10 +183,17 @@ enum s5m8767_regulators {
 	S5M8767_REG_MAX,
 };
 
+/* LDO_EN/BUCK_EN field in registers */
 #define S5M8767_ENCTRL_SHIFT		6
 #define S5M8767_ENCTRL_MASK		(0x3 << S5M8767_ENCTRL_SHIFT)
 
 /*
+ * LDO_EN/BUCK_EN register value for controlling this Buck or LDO
+ * by GPIO (PWREN, BUCKEN).
+ */
+#define S5M8767_ENCTRL_USE_GPIO		0x1
+
+/*
  * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
  * in mV/us.
  */