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authorGreg Kroah-Hartman <gregkh@google.com>2018-09-10 09:24:37 +0200
committerGreg Kroah-Hartman <gregkh@google.com>2018-09-10 09:24:37 +0200
commita8df443a71c369b5adb08ccec0149089fef603ad (patch)
tree9f27b4a8c9ba91f218b0a00a79f3a4f7900b8106 /include/linux/intel-iommu.h
parent0cb3f9f0b8ee04a809279018f5408efdd13f418e (diff)
parentfdf53713aebb1e8ccbfcadade2b8449e62394547 (diff)
Merge 4.4.155 into android-4.4-p
Changes in 4.4.155 net: 6lowpan: fix reserved space for single frames net: mac802154: tx: expand tailroom if necessary 9p/net: Fix zero-copy path in the 9p virtio transport net: lan78xx: Fix misplaced tasklet_schedule() call spi: davinci: fix a NULL pointer dereference drm/i915/userptr: reject zero user_size powerpc/fadump: handle crash memory ranges array index overflow powerpc/pseries: Fix endianness while restoring of r3 in MCE handler. fs/9p/xattr.c: catch the error of p9_client_clunk when setting xattr failed 9p/virtio: fix off-by-one error in sg list bounds check net/9p/client.c: version pointer uninitialized net/9p/trans_fd.c: fix race-condition by flushing workqueue before the kfree() x86/mm/pat: Fix L1TF stable backport for CPA, 2nd call dm cache metadata: save in-core policy_hint_size to on-disk superblock iio: ad9523: Fix displayed phase iio: ad9523: Fix return value for ad952x_store() vmw_balloon: fix inflation of 64-bit GFNs vmw_balloon: do not use 2MB without batching vmw_balloon: VMCI_DOORBELL_SET does not check status vmw_balloon: fix VMCI use when balloon built into kernel tracing: Do not call start/stop() functions when tracing_on does not change tracing/blktrace: Fix to allow setting same value kthread, tracing: Don't expose half-written comm when creating kthreads uprobes: Use synchronize_rcu() not synchronize_sched() 9p: fix multiple NULL-pointer-dereferences PM / sleep: wakeup: Fix build error caused by missing SRCU support pnfs/blocklayout: off by one in bl_map_stripe() ARM: tegra: Fix Tegra30 Cardhu PCA954x reset mm/tlb: Remove tlb_remove_table() non-concurrent condition iommu/vt-d: Add definitions for PFSID iommu/vt-d: Fix dev iotlb pfsid use osf_getdomainname(): use copy_to_user() sys: don't hold uts_sem while accessing userspace memory userns: move user access out of the mutex ubifs: Fix memory leak in lprobs self-check Revert "UBIFS: Fix potential integer overflow in allocation" ubifs: Check data node size before truncate ubifs: Fix synced_i_size calculation for xattr inodes pwm: tiehrpwm: Fix disabling of output of PWMs fb: fix lost console when the user unplugs a USB adapter udlfb: set optimal write delay getxattr: use correct xattr length bcache: release dc->writeback_lock properly in bch_writeback_thread() perf auxtrace: Fix queue resize fs/quota: Fix spectre gadget in do_quotactl x86/io: add interface to reserve io memtype for a resource range. (v1.1) drm/drivers: add support for using the arch wc mapping API. Linux 4.4.155 Change-Id: I34f5e28013b2762737e5f0c08b20ae1d0a0f34c0 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Diffstat (limited to 'include/linux/intel-iommu.h')
-rw-r--r--include/linux/intel-iommu.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 23e129ef6726..e353f6600b0b 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -125,6 +125,7 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
* Extended Capability Register
*/
+#define ecap_dit(e) ((e >> 41) & 0x1)
#define ecap_pasid(e) ((e >> 40) & 0x1)
#define ecap_pss(e) ((e >> 35) & 0x1f)
#define ecap_eafs(e) ((e >> 34) & 0x1)
@@ -294,6 +295,7 @@ enum {
#define QI_DEV_IOTLB_SID(sid) ((u64)((sid) & 0xffff) << 32)
#define QI_DEV_IOTLB_QDEP(qdep) (((qdep) & 0x1f) << 16)
#define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
+#define QI_DEV_IOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
#define QI_DEV_IOTLB_SIZE 1
#define QI_DEV_IOTLB_MAX_INVS 32
@@ -318,6 +320,7 @@ enum {
#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
+#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | ((u64)(pfsid & 0xfff) << 52))
#define QI_DEV_EIOTLB_MAX_INVS 32
#define QI_PGRP_IDX(idx) (((u64)(idx)) << 55)
@@ -463,9 +466,8 @@ extern void qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid,
u8 fm, u64 type);
extern void qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
unsigned int size_order, u64 type);
-extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
- u64 addr, unsigned mask);
-
+extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
+ u16 qdep, u64 addr, unsigned mask);
extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
extern int dmar_ir_support(void);