diff options
| author | Fenglin Wu <fenglinw@codeaurora.org> | 2016-08-18 10:54:00 +0800 |
|---|---|---|
| committer | Fenglin Wu <fenglinw@codeaurora.org> | 2016-08-30 15:10:35 +0800 |
| commit | ff68805c6594aef25d02f5ac866e6d6ebc61c5d8 (patch) | |
| tree | da675a2d6496ff97fa7cf46665f001b22ff7bdf3 /include/linux/fpga/fpga-mgr.h | |
| parent | f0629e4f2810ffcc44a0f65bc2af9ab439b0aee7 (diff) | |
pinctrl: qcom: spmi-mpp: Correct DTEST rail calculation
The DTEST1 rail selection value in the MODE_CTL register is not 0. Use
the proper offset value when calculating the value to write into the
MODE_CTL register.
Change-Id: Ia09aa072116d244abdd7ad0d92cc55e0aeba8efc
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions