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| author | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-07-24 20:33:31 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-07-29 00:14:27 -0700 |
| commit | 48965d20af4ed85cb8f240410e43ae041451f3df (patch) | |
| tree | 223a7e41fd3301d390a052f71d72cbb7c4ad8df5 /include/linux/fpga/fpga-mgr.h | |
| parent | 956d9b1ab3db6c7fef95964f7f6be8860433b74e (diff) | |
msm: mdss: fix clock and regulator configurations for DP
Add support for clock initialization during driver probe.
Add support to configure clock rates before enabling the
clocks.
Fix the regulators disable sequence for display-port.
We can only read hardware revision register only after
configuring the PHY. Move revision read to host_init()
function.
Change-Id: I0e9f6caf84a8cdd825002938dad18482e2489cbd
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions