scsi: ufs: add missing memory barriers

Performing several writes to UFS host controller registers has
no gurrantee of ordering, so we must make sure register writes
to setup request list base address etc. are performed before the
run/stop register is enabled.
In addition, when setting up a task request, we must make sure
the updating of descriptors takes places before ringing the
doorbell, similarly to setting up a transfer request.

Change-Id: I740331fe94da3cf8a8e7faee9020c88889aadea3
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>

0 files changed, 0 insertions, 0 deletions