diff options
| author | Taniya Das <tdas@codeaurora.org> | 2016-08-10 16:24:07 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-08-12 02:41:38 -0700 |
| commit | 6d1502887188ae911eeb8ac0c09a461e2c2ac754 (patch) | |
| tree | b13c2b859ff6fb81cd5485be93afc1e2bb27cbea /include/dt-bindings | |
| parent | f303bb651bcc4bc53482ce9f32ceddbbb7ad4f71 (diff) | |
clk: msm: Add support for block reset clocks for msmcobalt
Add the block reset clocks which will be used by clients to
assert/deassert these clocks using the reset controller framework.
Change-Id: I19f4f6e764ffde26ecf3b7cce3fb53a9bf2cc91a
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-cobalt.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h index 28efd55ea8f6..4596d1ee0174 100644 --- a/include/dt-bindings/clock/msm-clocks-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-cobalt.h @@ -504,4 +504,23 @@ #define clk_audio_pmi_clk 0xcbfe416d #define clk_audio_ap_clk2 0x454d1e91 +/* GCC block resets */ +#define QUSB2PHY_PRIM_BCR 0 +#define QUSB2PHY_SEC_BCR 1 +#define BLSP1_BCR 2 +#define BLSP2_BCR 3 +#define BOOT_ROM_BCR 4 +#define PRNG_BCR 5 +#define UFS_BCR 6 +#define USB_30_BCR 7 +#define USB3_PHY_BCR 8 +#define USB3PHY_PHY_BCR 9 +#define PCIE_0_PHY_BCR 10 +#define PCIE_PHY_BCR 11 +#define PCIE_PHY_COM_BCR 12 +#define PCIE_PHY_NOCSR_COM_PHY_BCR 13 + +/* MMSS block resets */ +#define CAMSS_MICRO_BCR 0 + #endif |