diff options
| author | Ingrid Gallardo <ingridg@codeaurora.org> | 2017-01-12 17:31:15 -0800 |
|---|---|---|
| committer | Ingrid Gallardo <ingridg@codeaurora.org> | 2017-01-16 14:55:16 -0800 |
| commit | e51702e4ddecdfcabfbfcfcb9e9b40938b4f0644 (patch) | |
| tree | 49d878516ab06830e0ebeb10204865e1f388816e /fs/jbd2/commit.c | |
| parent | 6998daf8c5fbfa58f8fc9e33407cafeb39de714e (diff) | |
msm: mdss: fix for the mmss gdsc sequence
Current Display driver sets to true the ram status variable
shared with the RPM to prevent MMSS GDSC to go OFF only
when we are about to disable the MDSS GDSC regulator for the
Idle Screen scenario; The potential problem with this is that
there is a 4-vsyncs period of time between the end of the
display last transaction (ping pong done) and the release of
the MDSS GDSC regulator (for Idle Screen) where the Display
related clocks are already released and MDSS GDSC regulator
is still on (so rpm variable is still false), causing that Xo
shutdown (and therefore MMSS GDSC off) can happen while the
MDSS GDSC is still active during this period of time.
This change makes sure that any time that the MDSS GDSC
regulator is enabled or when the MDSS GDSC regulator is
disabled but the Display is still active but in Idle Screen,
Display sets the flag to ensure that the MMSS GDSC regulator
is not disabled by the RPM, flag is released once our MDSS
regulator is disabled for Suspend.
Also, re-arrange the sequence to make sure the change of
the flag happens after we disabled the MDSS GDSC regulator,
so we prevent that by any reason the MDSS GDSC could go off
before the MMSS GDSC regulator.
Change-Id: I141cb893c4e2a54f99e65383e69b4ce88ab4c761
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Diffstat (limited to 'fs/jbd2/commit.c')
0 files changed, 0 insertions, 0 deletions
