summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorCasey Piper <cpiper@codeaurora.org>2015-02-17 17:40:50 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:38:00 -0700
commit8d2a693f400089f3079ae2af2ce99357e7dd3edc (patch)
tree9c3d23f2626f4c6490ee9eafea1f23067a5dba68 /drivers
parent341887ec2d62ec973960614d628919f2ef59a8e6 (diff)
msm: mdss: hdmi: reset HDCP core during reauthentication
Reset HDCP engine during HDCP reauthentication. This will prevent HDCP engine from going into a bad state of continuous authentication failures. Change-Id: I727857c23673c55d77144d63fc4de2c89d6ec5a6 Signed-off-by: Casey Piper <cpiper@codeaurora.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/fbdev/msm/mdss_hdmi_hdcp.c7
-rw-r--r--drivers/video/fbdev/msm/mdss_hdmi_util.h7
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_hdcp.c b/drivers/video/fbdev/msm/mdss_hdmi_hdcp.c
index 82d51f81c57b..8ae18eed0833 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_hdcp.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_hdcp.c
@@ -1242,6 +1242,7 @@ int hdmi_hdcp_reauthenticate(void *input)
{
struct hdmi_hdcp_ctrl *hdcp_ctrl = (struct hdmi_hdcp_ctrl *)input;
struct dss_io_data *io;
+ u32 hdmi_hw_version;
u32 ret = 0;
if (!hdcp_ctrl || !hdcp_ctrl->init_data.core_io) {
@@ -1266,6 +1267,12 @@ int hdmi_hdcp_reauthenticate(void *input)
DSS_REG_W(io, HDMI_HPD_CTRL, DSS_REG_R(hdcp_ctrl->init_data.core_io,
HDMI_HPD_CTRL) & ~BIT(28));
+ hdmi_hw_version = DSS_REG_R(io, HDMI_VERSION);
+ if (hdmi_hw_version >= 0x30030000) {
+ DSS_REG_W(io, HDMI_CTRL_SW_RESET, BIT(1));
+ DSS_REG_W(io, HDMI_CTRL_SW_RESET, 0);
+ }
+
/* Disable HDCP interrupts */
DSS_REG_W(io, HDMI_HDCP_INT_CTRL, 0);
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.h b/drivers/video/fbdev/msm/mdss_hdmi_util.h
index 7d76583e95ad..d1d4780c5207 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_util.h
+++ b/drivers/video/fbdev/msm/mdss_hdmi_util.h
@@ -207,6 +207,13 @@
#define HDMI_CEC_RD_TOTAL_RANGE (0x00000368)
#define HDMI_CEC_RD_ERR_RESP_LO (0x0000036C)
#define HDMI_CEC_WR_CHECK_CONFIG (0x00000370)
+#define HDMI_INTERNAL_TIMING_MODE (0x00000374)
+#define HDMI_CTRL_SW_RESET (0x00000378)
+#define HDMI_CTRL_AUDIO_RESET (0x0000037C)
+#define HDMI_SCRATCH (0x00000380)
+#define HDMI_CLK_CTRL (0x00000384)
+#define HDMI_CLK_ACTIVE (0x00000388)
+#define HDMI_VBI_CFG (0x0000038C)
#define HDMI_DDC_INT_CTRL0 (0x00000430)
#define HDMI_DDC_INT_CTRL1 (0x00000434)
#define HDMI_DDC_INT_CTRL2 (0x00000438)