msm: mdss: refactor register space io remap to use common utility

Refactor MDSS and VBIF registers ioremap to go through common utility
functions and add API to allow adding any register base which uses
utility structure. Expose VBIF register base through this utility.

Change-Id: I97ca2db07e40b261abf1a46b427a373295886cb2
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>

8 files changed, 88 insertions, 88 deletions

diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h
index 6dcffabb51d6..64e4f5b377c4 100644
--- a/drivers/video/fbdev/msm/mdss.h
+++ b/drivers/video/fbdev/msm/mdss.h
@@ -20,7 +20,7 @@
 #include <linux/types.h>
 #include <linux/workqueue.h>
 #include <linux/irqreturn.h>
-
+#include <linux/mdss_io_util.h>
 #include <linux/msm_iommu_domains.h>
 
 #include "mdss_panel.h"
@@ -118,9 +118,8 @@ struct mdss_data_type {
 	u32 max_mdp_clk_rate;
 
 	struct platform_device *pdev;
-	char __iomem *mdss_base;
-	size_t mdp_reg_size;
-	char __iomem *vbif_base;
+	struct dss_io_data mdss_io;
+	struct dss_io_data vbif_io;
 	char __iomem *mdp_base;
 
 	struct mutex reg_lock;
@@ -281,4 +280,14 @@ static inline int mdss_get_sd_client_cnt(void)
 	else
 		return atomic_read(&mdss_res->sd_client_count);
 }
+
+#define MDSS_VBIF_WRITE(mdata, offset, value) \
+		dss_reg_w(&mdata->vbif_io, offset, value, 0)
+#define MDSS_VBIF_READ(mdata, offset) \
+		dss_reg_r(&mdata->vbif_io, offset, 0)
+#define MDSS_REG_WRITE(mdata, offset, value) \
+		dss_reg_w(&mdata->mdss_io, offset, value, 0)
+#define MDSS_REG_READ(mdata, offset) \
+		dss_reg_r(&mdata->mdss_io, offset, 0)
+
 #endif /* MDSS_H */
diff --git a/drivers/video/fbdev/msm/mdss_debug.h b/drivers/video/fbdev/msm/mdss_debug.h
index 42e4d1b9af6d..402e5564638c 100644
--- a/drivers/video/fbdev/msm/mdss_debug.h
+++ b/drivers/video/fbdev/msm/mdss_debug.h
@@ -15,6 +15,8 @@
 #define MDSS_DEBUG_H
 
 #include <stdarg.h>
+#include <linux/mdss_io_util.h>
+
 #include "mdss.h"
 #include "mdss_mdp_trace.h"
 
@@ -106,4 +108,11 @@ static inline void mdss_dump_reg(char __iomem *base, int len) { }
 static inline void mdss_dsi_debug_check_te(struct mdss_panel_data *pdata) { }
 static inline void mdss_xlog_tout_handler(const char *name, ...) { }
 #endif
+
+static inline int mdss_debug_register_io(const char *name,
+		struct dss_io_data *io_data)
+{
+	return mdss_debug_register_base(name, io_data->base, io_data->len);
+}
+
 #endif /* MDSS_DEBUG_H */
diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c
index ce90d24a42d3..4d2597e5efb1 100644
--- a/drivers/video/fbdev/msm/mdss_mdp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp.c
@@ -191,15 +191,15 @@ int mdss_mdp_vbif_axi_halt(struct mdss_data_type *mdata)
 		idle_mask |= BIT(5);
 
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
-	reg_val = readl_relaxed(mdata->vbif_base + MMSS_VBIF_AXI_HALT_CTRL1);
+	reg_val = MDSS_VBIF_READ(mdata, MMSS_VBIF_AXI_HALT_CTRL1);
 
 	is_idle = (reg_val & idle_mask) ? true : false;
 	if (!is_idle) {
 		pr_err("axi is not idle. halt_ctrl1=%d\n", reg_val);
 
-		writel_relaxed(1, mdata->vbif_base + MMSS_VBIF_AXI_HALT_CTRL0);
+		MDSS_VBIF_WRITE(mdata, MMSS_VBIF_AXI_HALT_CTRL0, 1);
 
-		rc = readl_poll_timeout(mdata->vbif_base +
+		rc = readl_poll_timeout(mdata->vbif_io.base +
 			MMSS_VBIF_AXI_HALT_CTRL1, status, (status & idle_mask),
 			1000, AXI_HALT_TIMEOUT_US);
 		if (rc == -ETIMEDOUT)
@@ -207,7 +207,7 @@ int mdss_mdp_vbif_axi_halt(struct mdss_data_type *mdata)
 		else
 			pr_debug("VBIF axi is halted\n");
 
-		writel_relaxed(0, mdata->vbif_base + MMSS_VBIF_AXI_HALT_CTRL0);
+		MDSS_VBIF_WRITE(mdata, MMSS_VBIF_AXI_HALT_CTRL0, 0);
 	}
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
 
@@ -245,7 +245,7 @@ static inline int mdss_irq_dispatch(u32 hw_ndx, int irq, void *ptr)
 static irqreturn_t mdss_irq_handler(int irq, void *ptr)
 {
 	struct mdss_data_type *mdata = ptr;
-	u32 intr = readl_relaxed(mdata->mdss_base + MDSS_REG_HW_INTR_STATUS);
+	u32 intr = MDSS_REG_READ(mdata, MDSS_REG_HW_INTR_STATUS);
 
 	if (!mdata)
 		return IRQ_NONE;
@@ -1131,7 +1131,8 @@ static int mdss_mdp_debug_init(struct mdss_data_type *mdata)
 	if (rc)
 		return rc;
 
-	mdss_debug_register_base("mdp", mdata->mdss_base, mdata->mdp_reg_size);
+	mdss_debug_register_io("mdp", &mdata->mdss_io);
+	mdss_debug_register_io("vbif", &mdata->vbif_io);
 
 	return 0;
 }
@@ -1150,8 +1151,9 @@ static void mdss_hw_rev_init(struct mdss_data_type *mdata)
 {
 	if (mdata->mdp_rev)
 		return;
+
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
-	mdata->mdp_rev = readl_relaxed(mdata->mdss_base + MDSS_REG_HW_VERSION);
+	mdata->mdp_rev = MDSS_REG_READ(mdata, MDSS_REG_HW_VERSION);
 	pr_info_once("MDP Rev=%x\n", mdata->mdp_rev);
 	mdss_mdp_max_zorder_init(mdata);
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
@@ -1497,42 +1499,23 @@ static int mdss_mdp_probe(struct platform_device *pdev)
 	mutex_init(&mdata->reg_lock);
 	atomic_set(&mdata->sd_client_count, 0);
 
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mdp_phys");
-	if (!res) {
-		pr_err("unable to get MDP base address\n");
-		rc = -ENOMEM;
-		goto probe_done;
-	}
-
-	mdata->mdp_reg_size = resource_size(res);
-	mdata->mdss_base = devm_ioremap(&pdev->dev, res->start,
-				       mdata->mdp_reg_size);
-	if (unlikely(!mdata->mdss_base)) {
+	rc = msm_dss_ioremap_byname(pdev, &mdata->mdss_io, "mdp_phys");
+	if (rc) {
 		pr_err("unable to map MDP base\n");
-		rc = -ENOMEM;
 		goto probe_done;
 	}
-	pr_info("MDSS HW Base phy_Address=0x%x virt=0x%x\n",
-		(int) (unsigned long) res->start,
-		(int) (unsigned long) mdata->mdss_base);
+	pr_debug("MDSS HW Base addr=0x%x len=0x%x\n",
+		(int) (unsigned long) mdata->mdss_io.base,
+		mdata->mdss_io.len);
 
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vbif_phys");
-	if (!res) {
-		pr_err("unable to get MDSS VBIF base address\n");
-		rc = -ENOMEM;
-		goto probe_done;
-	}
-
-	mdata->vbif_base = devm_ioremap(&pdev->dev, res->start,
-					resource_size(res));
-	if (unlikely(!mdata->vbif_base)) {
+	rc = msm_dss_ioremap_byname(pdev, &mdata->vbif_io, "vbif_phys");
+	if (rc) {
 		pr_err("unable to map MDSS VBIF base\n");
-		rc = -ENOMEM;
 		goto probe_done;
 	}
-	pr_info("MDSS VBIF HW Base phy_Address=0x%x virt=0x%x\n",
-		(int) (unsigned long) res->start,
-		(int) (unsigned long) mdata->vbif_base);
+	pr_debug("MDSS VBIF HW Base addr=0x%x len=0x%x\n",
+		(int) (unsigned long) mdata->vbif_io.base,
+		mdata->vbif_io.len);
 
 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 	if (!res) {
@@ -1606,7 +1589,7 @@ probe_done:
 	return rc;
 }
 
-static void mdss_mdp_parse_dt_regs_array(const u32 *arr, char __iomem *hw_base,
+static void mdss_mdp_parse_dt_regs_array(const u32 *arr, struct dss_io_data *io,
 	struct mdss_hw_settings *hws, int count)
 {
 	u32 len, reg;
@@ -1617,7 +1600,10 @@ static void mdss_mdp_parse_dt_regs_array(const u32 *arr, char __iomem *hw_base,
 
 	for (i = 0, len = count * 2; i < len; i += 2) {
 		reg = be32_to_cpu(arr[i]);
-		hws->reg = hw_base + reg;
+		if (reg >= io->len)
+			continue;
+
+		hws->reg = io->base + reg;
 		hws->val = be32_to_cpu(arr[i + 1]);
 		pr_debug("reg: 0x%04x=0x%08x\n", reg, hws->val);
 		hws++;
@@ -1655,8 +1641,9 @@ int mdss_mdp_parse_dt_hw_settings(struct platform_device *pdev)
 	if (!hws)
 		return -ENOMEM;
 
-	mdss_mdp_parse_dt_regs_array(vbif_arr, mdata->vbif_base, hws, vbif_len);
-	mdss_mdp_parse_dt_regs_array(mdp_arr, mdata->mdss_base,
+	mdss_mdp_parse_dt_regs_array(vbif_arr, &mdata->vbif_io,
+			hws, vbif_len);
+	mdss_mdp_parse_dt_regs_array(mdp_arr, &mdata->mdss_io,
 		hws + vbif_len, mdp_len);
 
 	mdata->hw_settings = hws;
@@ -1736,7 +1723,7 @@ static int mdss_mdp_parse_dt(struct platform_device *pdev)
 		pr_err("Error in device tree : mdp reg base\n");
 		return rc;
 	}
-	mdata->mdp_base = mdata->mdss_base + data;
+	mdata->mdp_base = mdata->mdss_io.base + data;
 	return 0;
 }
 
diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c
index e0e738aa3e5a..9b0d05a17df8 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c
@@ -2538,13 +2538,14 @@ int mdss_mdp_mixer_addr_setup(struct mdss_data_type *mdata,
 
 	for (i = 0; i < len; i++) {
 		head[i].type = type;
-		head[i].base = mdata->mdss_base + mixer_offsets[i];
+		head[i].base = mdata->mdss_io.base + mixer_offsets[i];
 		head[i].ref_cnt = 0;
 		head[i].num = i;
 		if (type == MDSS_MDP_MIXER_TYPE_INTF) {
-			head[i].dspp_base = mdata->mdss_base + dspp_offsets[i];
-			head[i].pingpong_base = mdata->mdss_base +
-				pingpong_offsets[i];
+			head[i].dspp_base = mdata->mdss_io.base +
+					dspp_offsets[i];
+			head[i].pingpong_base = mdata->mdss_io.base +
+					pingpong_offsets[i];
 		}
 	}
 
@@ -2605,8 +2606,8 @@ int mdss_mdp_ctl_addr_setup(struct mdss_data_type *mdata,
 
 	for (i = 0; i < len; i++) {
 		head[i].num = i;
-		head[i].base = (mdata->mdss_base) + ctl_offsets[i];
-		head[i].wb_base = (mdata->mdss_base) + wb_offsets[i];
+		head[i].base = (mdata->mdss_io.base) + ctl_offsets[i];
+		head[i].wb_base = (mdata->mdss_io.base) + wb_offsets[i];
 		head[i].ref_cnt = 0;
 	}
 
diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
index 3072a61c2e0e..558e27314712 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c
@@ -104,7 +104,7 @@ int mdss_mdp_video_addr_setup(struct mdss_data_type *mdata,
 		return -ENOMEM;
 
 	for (i = 0; i < count; i++) {
-		head[i].base = mdata->mdss_base + offsets[i];
+		head[i].base = mdata->mdss_io.base + offsets[i];
 		pr_debug("adding Video Intf #%d offset=0x%x virt=%p\n", i,
 				offsets[i], head[i].base);
 		head[i].ref_cnt = 0;
diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_writeback.c b/drivers/video/fbdev/msm/mdss_mdp_intf_writeback.c
index 18d46cbac7c8..b184f6bf6abd 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_intf_writeback.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_intf_writeback.c
@@ -13,6 +13,7 @@
 
 #define pr_fmt(fmt)	"%s: " fmt, __func__
 
+#include "mdss.h"
 #include "mdss_mdp.h"
 #include "mdss_mdp_rotator.h"
 #include "mdss_panel.h"
@@ -610,12 +611,10 @@ static int mdss_mdp_writeback_display(struct mdss_mdp_ctl *ctl, void *arg)
 		reg_off = (ctx->xin_id / 4) * 4;
 		bit_off = (ctx->xin_id % 4) * 8;
 
-		val = readl_relaxed(ctl->mdata->vbif_base + VBIF_WR_LIM_CONF +
-			reg_off);
+		val = MDSS_VBIF_READ(ctl->mdata, VBIF_WR_LIM_CONF + reg_off);
 		val &= ~(0xFF << bit_off);
 		val |= (ctx->wr_lim) << bit_off;
-		writel_relaxed(val, ctl->mdata->vbif_base + VBIF_WR_LIM_CONF +
-			reg_off);
+		MDSS_VBIF_WRITE(ctl->mdata, VBIF_WR_LIM_CONF + reg_off, val);
 	}
 
 	wb_args = (struct mdss_mdp_writeback_arg *) arg;
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pipe.c b/drivers/video/fbdev/msm/mdss_mdp_pipe.c
index 350bac0dcef1..83b4da5bb39a 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_pipe.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_pipe.c
@@ -564,15 +564,13 @@ static void mdss_mdp_qos_vbif_remapper_setup(struct mdss_data_type *mdata,
 
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
 	for (i = 0; i < mdata->npriority_lvl; i++) {
-		reg_val = readl_relaxed(mdata->vbif_base +
-				MDSS_VBIF_QOS_REMAP_BASE + i*4);
+		reg_val = MDSS_VBIF_READ(mdata, MDSS_VBIF_QOS_REMAP_BASE + i*4);
 		mask = 0x3 << (pipe->xin_id * 2);
 		reg_val &= ~(mask);
 		vbif_qos = is_realtime ?
 			mdata->vbif_rt_qos[i] : mdata->vbif_nrt_qos[i];
 		reg_val |= vbif_qos << (pipe->xin_id * 2);
-		writel_relaxed(reg_val, mdata->vbif_base +
-				MDSS_VBIF_QOS_REMAP_BASE + i*4);
+		MDSS_VBIF_WRITE(mdata, MDSS_VBIF_QOS_REMAP_BASE + i*4, reg_val);
 	}
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
 }
@@ -595,13 +593,13 @@ static void mdss_mdp_fixed_qos_arbiter_setup(struct mdss_data_type *mdata,
 
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
 	mutex_lock(&mdata->reg_lock);
-	reg_val = readl_relaxed(mdata->vbif_base + MDSS_VBIF_FIXED_SORT_EN);
+	reg_val = MDSS_VBIF_READ(mdata, MDSS_VBIF_FIXED_SORT_EN);
 	mask = 0x1 << pipe->xin_id;
 	reg_val |= mask;
 
 	/* Enable the fixed sort for the client */
-	writel_relaxed(reg_val, mdata->vbif_base + MDSS_VBIF_FIXED_SORT_EN);
-	reg_val = readl_relaxed(mdata->vbif_base + MDSS_VBIF_FIXED_SORT_SEL0);
+	MDSS_VBIF_WRITE(mdata, MDSS_VBIF_FIXED_SORT_EN, reg_val);
+	reg_val = MDSS_VBIF_READ(mdata, MDSS_VBIF_FIXED_SORT_SEL0);
 	mask = 0x1 << (pipe->xin_id * 2);
 	if (is_realtime) {
 		reg_val &= ~mask;
@@ -613,7 +611,7 @@ static void mdss_mdp_fixed_qos_arbiter_setup(struct mdss_data_type *mdata,
 				pipe->type, pipe->num);
 	}
 	/* Set the fixed_sort regs as per RT/NRT client */
-	writel_relaxed(reg_val, mdata->vbif_base + MDSS_VBIF_FIXED_SORT_SEL0);
+	MDSS_VBIF_WRITE(mdata, MDSS_VBIF_FIXED_SORT_SEL0, reg_val);
 	mutex_unlock(&mdata->reg_lock);
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
 }
@@ -929,7 +927,7 @@ static int mdss_mdp_is_pipe_idle(struct mdss_mdp_pipe *pipe,
 		goto exit;
 
 	vbif_idle_mask = BIT(pipe->xin_id + 16);
-	reg_val = readl_relaxed(mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL1);
+	reg_val = MDSS_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL1);
 
 	if (reg_val & vbif_idle_mask)
 		is_idle = true;
@@ -977,20 +975,19 @@ int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe)
 		mutex_lock(&mdata->reg_lock);
 		idle_mask = BIT(pipe->xin_id + 16);
 
-		reg_val = readl_relaxed(mdata->vbif_base +
-			MMSS_VBIF_XIN_HALT_CTRL0);
-		writel_relaxed(reg_val | BIT(pipe->xin_id),
-			mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL0);
+		reg_val = MDSS_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
+		MDSS_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
+				reg_val | BIT(pipe->xin_id));
 
 		if (sw_reset_avail) {
-			reg_val = readl_relaxed(mdata->mdp_base + sw_reset_off);
-			writel_relaxed(reg_val | BIT(pipe->sw_reset.bit_off),
-				mdata->mdp_base + sw_reset_off);
+			reg_val = MDSS_VBIF_READ(mdata, sw_reset_off);
+			MDSS_VBIF_WRITE(mdata, sw_reset_off,
+					reg_val | BIT(pipe->sw_reset.bit_off));
 			wmb();
 		}
 		mutex_unlock(&mdata->reg_lock);
 
-		rc = readl_poll_timeout(mdata->vbif_base +
+		rc = readl_poll_timeout(mdata->vbif_io.base +
 			MMSS_VBIF_XIN_HALT_CTRL1, status, (status & idle_mask),
 			1000, PIPE_HALT_TIMEOUT_US);
 		if (rc == -ETIMEDOUT)
@@ -1000,23 +997,20 @@ int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe)
 			pr_debug("VBIF client %d is halted\n", pipe->xin_id);
 
 		mutex_lock(&mdata->reg_lock);
-		reg_val = readl_relaxed(mdata->vbif_base +
-			MMSS_VBIF_XIN_HALT_CTRL0);
-		writel_relaxed(reg_val & ~BIT(pipe->xin_id),
-			mdata->vbif_base + MMSS_VBIF_XIN_HALT_CTRL0);
+		reg_val = MDSS_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
+		MDSS_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
+				reg_val & ~BIT(pipe->xin_id));
 
 		if (sw_reset_avail) {
-			writel_relaxed(reg_val & ~BIT(pipe->sw_reset.bit_off),
-				mdata->mdp_base + sw_reset_off);
+			MDSS_VBIF_WRITE(mdata, sw_reset_off,
+					reg_val & ~BIT(pipe->sw_reset.bit_off));
 			wmb();
 
-			reg_val = readl_relaxed(mdata->mdp_base + clk_ctrl_off);
+			reg_val = MDSS_VBIF_READ(mdata, clk_ctrl_off);
 			reg_val |= BIT(pipe->clk_ctrl.bit_off +
 				CLK_FORCE_OFF_OFFSET);
-			writel_relaxed(reg_val,
-				mdata->mdp_base + clk_ctrl_off);
+			MDSS_VBIF_WRITE(mdata, clk_ctrl_off, reg_val);
 		}
-
 		mutex_unlock(&mdata->reg_lock);
 		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
 	}
@@ -1320,7 +1314,7 @@ int mdss_mdp_pipe_addr_setup(struct mdss_data_type *mdata,
 		head[i].num = i + num_base;
 		head[i].ndx = BIT(i + num_base);
 		head[i].priority = i + priority_base;
-		head[i].base = mdata->mdss_base + offsets[i];
+		head[i].base = mdata->mdss_io.base + offsets[i];
 		pr_info("type:%d ftchid:%d xinid:%d num:%d ndx:0x%x prio:%d\n",
 			head[i].type, head[i].ftch_id, head[i].xin_id,
 			head[i].num, head[i].ndx, head[i].priority);
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c
index f1f35324c1fd..bb27186219df 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_pp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c
@@ -4944,7 +4944,7 @@ int mdss_mdp_ad_addr_setup(struct mdss_data_type *mdata, u32 *ad_offsets)
 
 	mdata->ad_calc_wq = create_singlethread_workqueue("ad_calc_wq");
 	for (i = 0; i < mdata->nad_cfgs; i++) {
-		mdata->ad_off[i].base = mdata->mdss_base + ad_offsets[i];
+		mdata->ad_off[i].base = mdata->mdss_io.base + ad_offsets[i];
 		mdata->ad_off[i].num = i;
 		mdata->ad_cfgs[i].num = i;
 		mdata->ad_cfgs[i].ops = 0;
@@ -5212,7 +5212,7 @@ static int is_valid_calib_addr(void *addr, u32 operation)
 
 	if ((uintptr_t) addr % 4) {
 		ret = 0;
-	} else if (ptr == mdss_res->mdss_base + MDSS_REG_HW_VERSION) {
+	} else if (ptr == mdss_res->mdss_io.base + MDSS_REG_HW_VERSION) {
 		ret = MDP_PP_OPS_READ;
 	} else if (ptr == (mdss_res->mdp_base + MDSS_MDP_REG_HW_VERSION) ||
 	    ptr == (mdss_res->mdp_base + MDSS_MDP_REG_DISP_INTF_SEL)) {
@@ -5268,7 +5268,7 @@ int mdss_mdp_calib_config(struct mdp_calib_config_data *cfg, u32 *copyback)
 
 	/* Calib addrs are always offsets from the MDSS base */
 	ptr = (void *)((unsigned long) cfg->addr) +
-		((uintptr_t) mdss_res->mdss_base);
+		((uintptr_t) mdss_res->mdss_io.base);
 	if (is_valid_calib_addr(ptr, cfg->ops))
 		ret = 0;
 	else
@@ -5333,7 +5333,8 @@ int mdss_mdp_calib_config_buffer(struct mdp_calib_config_buffer *cfg,
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
 
 	for (i = 0; i < counter; i++) {
-		ptr = (void *) (((unsigned int) *buff) + mdss_res->mdss_base);
+		ptr = (void *) (((unsigned int) *buff) +
+				mdss_res->mdss_io.base);
 
 		if (!is_valid_calib_addr(ptr, cfg->ops)) {
 			ret = -1;