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authorAjay Singh Parmar <aparmar@codeaurora.org>2015-10-23 23:54:37 -0700
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:47:23 -0700
commita5d905591a3de595fce17bf5845c2411c8ba3fc2 (patch)
tree76672285a52d0e97c8d2bbaf79275a35880311aa /drivers/video/fbdev
parentba6ca57a7c19ee000136efd02637d4473565e429 (diff)
msm: mdss: hdmi: use proper timeout values while reading rxstatus
Calculate timeout values in terms of hsync with respect to resolution timing. For a given timeout value, calculate number of lines that will take that much of time to be transmitted to sink. Use that value to program the hardware for timeout. Change-Id: I9606180d4c9b2d666dbac3d807f5bb61b84af68e Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Diffstat (limited to 'drivers/video/fbdev')
-rw-r--r--drivers/video/fbdev/msm/mdss_hdmi_hdcp2p2.c26
-rw-r--r--drivers/video/fbdev/msm/mdss_hdmi_util.c4
2 files changed, 26 insertions, 4 deletions
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_hdcp2p2.c b/drivers/video/fbdev/msm/mdss_hdmi_hdcp2p2.c
index 6a99cb32dab7..b9e70b042b62 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_hdcp2p2.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_hdcp2p2.c
@@ -36,6 +36,10 @@
#define HDCP2P2_LINK_CHECK_TIME_MS 500 /* link check within 1 sec */
+#define HDCP2P2_SEC_TO_US 1000000
+#define HDCP2P2_MS_TO_US 1000
+#define HDCP2P2_KHZ_TO_HZ 1000
+
/*
* HDCP 2.2 encryption requires the data encryption block that is present in
* HDMI controller version 4.0.0 and above
@@ -491,7 +495,9 @@ exit:
static void hdmi_hdcp2p2_recv_msg_work(struct kthread_work *work)
{
int rc = 0;
- u64 mult;
+ u32 fps, v_total;
+ u32 time_taken_by_one_line_us;
+ u32 lines_needed_for_given_time;
char *recvd_msg_buf = NULL;
struct hdmi_hdcp2p2_ctrl *ctrl = container_of(work,
struct hdmi_hdcp2p2_ctrl, recv_msg);
@@ -525,9 +531,23 @@ static void hdmi_hdcp2p2_recv_msg_work(struct kthread_work *work)
memset(ddc_data, 0, sizeof(*ddc_data));
timing = ctrl->init_data.timing;
- mult = hdmi_tx_get_v_total(timing) / 20;
+
+ fps = timing->refresh_rate / HDCP2P2_KHZ_TO_HZ;
+ v_total = hdmi_tx_get_v_total(timing);
+
+ /*
+ * pixel clock = h_total * v_total * fps
+ * 1 sec = pixel clock number of pixels are transmitted.
+ * time taken by one line (h_total) = 1 / (v_total * fps).
+ */
+ time_taken_by_one_line_us = HDCP2P2_SEC_TO_US / (v_total * fps);
+ lines_needed_for_given_time = (ctrl->timeout * HDCP2P2_MS_TO_US) /
+ time_taken_by_one_line_us;
+
+ pr_debug("timeout for rxstatus %d\n", lines_needed_for_given_time);
+
ddc_data->intr_mask = RXSTATUS_MESSAGE_SIZE;
- ddc_data->timer_delay_lines = (u32)mult;
+ ddc_data->timer_delay_lines = lines_needed_for_given_time;
ddc_data->read_method = HDCP2P2_RXSTATUS_HW_DDC_SW_TRIGGER;
rc = hdmi_hdcp2p2_ddc_read_rxstatus(ddc_ctrl);
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.c b/drivers/video/fbdev/msm/mdss_hdmi_util.c
index b706fe50a1de..6012a0740f24 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_util.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_util.c
@@ -18,6 +18,7 @@
#include "mdss_hdmi_util.h"
#define RESOLUTION_NAME_STR_LEN 30
+#define HDMI_SEC_TO_MS 1000
#define HDMI_SCDC_UNKNOWN_REGISTER "Unknown register"
@@ -1661,9 +1662,10 @@ int hdmi_hdcp2p2_ddc_read_rxstatus(struct hdmi_tx_ddc_ctrl *ctrl)
DSS_REG_W(ctrl->io, HDMI_HDCP2P2_DDC_SW_TRIGGER, 1);
reinit_completion(&ctrl->rxstatus_completion);
+ /* max timeout as per hdcp 2.2 std is 1 sec */
timeout = wait_for_completion_timeout(
&ctrl->rxstatus_completion,
- msecs_to_jiffies(200));
+ msecs_to_jiffies(HDMI_SEC_TO_MS));
if (!timeout) {
pr_err("sw ddc rxstatus timeout\n");
rc = -ETIMEDOUT;