diff options
| author | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-08-08 09:56:03 -0700 |
|---|---|---|
| committer | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-08-22 21:11:06 -0700 |
| commit | 3156dc80cb80cafff2721589d5b749bb403104da (patch) | |
| tree | c6370b008579c501229396eec976f0a3822f493f /drivers/video/fbdev | |
| parent | 9ec9267905e8e712eba27c106c96e78c6da3e56f (diff) | |
clk: msm: mdss: update Dp PLL/Phy configuration
Update the Display-Port PHY and PLL configuration
with the recommended settings. Remove the
support for 9.72Ghz VCO frequency. Update the divider
settings to support the new frequency plan.
Update the Phy Aux settings and voltage/pre-emphasis
settings according to recommended configuration.
Change-Id: Ic4d206da3dc6b45214e7601e7556cfb0bef81a7d
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Diffstat (limited to 'drivers/video/fbdev')
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_dp_aux.c | 8 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_dp_util.c | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/video/fbdev/msm/mdss_dp_aux.c b/drivers/video/fbdev/msm/mdss_dp_aux.c index fc24bb53a61c..0bbcd0c9041e 100644 --- a/drivers/video/fbdev/msm/mdss_dp_aux.c +++ b/drivers/video/fbdev/msm/mdss_dp_aux.c @@ -1109,16 +1109,16 @@ static void dp_host_train_set(struct mdss_dp_drv_pdata *ep, int train) } char vm_pre_emphasis[4][4] = { - {0x03, 0x06, 0x09, 0x0C}, /* pe0, 0 db */ - {0x03, 0x06, 0x09, 0xFF}, /* pe1, 3.5 db */ + {0x00, 0x06, 0x09, 0x0C}, /* pe0, 0 db */ + {0x00, 0x06, 0x09, 0xFF}, /* pe1, 3.5 db */ {0x03, 0x06, 0xFF, 0xFF}, /* pe2, 6.0 db */ {0x03, 0xFF, 0xFF, 0xFF} /* pe3, 9.5 db */ }; /* voltage swing, 0.2v and 1.0v are not support */ char vm_voltage_swing[4][4] = { - {0x14, 0x18, 0x1A, 0x1E}, /* sw0, 0.4v */ - {0x18, 0x1A, 0x1E, 0xFF}, /* sw1, 0.6 v */ + {0x0a, 0x18, 0x1A, 0x1E}, /* sw0, 0.4v */ + {0x07, 0x1A, 0x1E, 0xFF}, /* sw1, 0.6 v */ {0x1A, 0x1E, 0xFF, 0xFF}, /* sw1, 0.8 v */ {0x1E, 0xFF, 0xFF, 0xFF} /* sw1, 1.2 v, optional */ }; diff --git a/drivers/video/fbdev/msm/mdss_dp_util.c b/drivers/video/fbdev/msm/mdss_dp_util.c index f7b27d1e56a1..7785673a8606 100644 --- a/drivers/video/fbdev/msm/mdss_dp_util.c +++ b/drivers/video/fbdev/msm/mdss_dp_util.c @@ -239,13 +239,13 @@ void mdss_dp_ctrl_lane_mapping(struct dss_io_data *ctrl_io, void mdss_dp_phy_aux_setup(struct dss_io_data *phy_io) { writel_relaxed(0x3d, phy_io->base + DP_PHY_PD_CTL); - writel_relaxed(0x03, phy_io->base + DP_PHY_AUX_CFG1); - writel_relaxed(0x00, phy_io->base + DP_PHY_AUX_CFG3); + writel_relaxed(0x13, phy_io->base + DP_PHY_AUX_CFG1); + writel_relaxed(0x10, phy_io->base + DP_PHY_AUX_CFG3); writel_relaxed(0x0a, phy_io->base + DP_PHY_AUX_CFG4); writel_relaxed(0x26, phy_io->base + DP_PHY_AUX_CFG5); writel_relaxed(0x0a, phy_io->base + DP_PHY_AUX_CFG6); writel_relaxed(0x03, phy_io->base + DP_PHY_AUX_CFG7); - writel_relaxed(0xbb, phy_io->base + DP_PHY_AUX_CFG8); + writel_relaxed(0x8b, phy_io->base + DP_PHY_AUX_CFG8); writel_relaxed(0x03, phy_io->base + DP_PHY_AUX_CFG9); writel_relaxed(0x1f, phy_io->base + DP_PHY_AUX_INTERRUPT_MASK); } |