diff options
| author | Veera Sundaram Sankaran <veeras@codeaurora.org> | 2015-09-18 14:29:14 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:45:53 -0700 |
| commit | 2fba6da0d51bcdb304974729ab406440fe506460 (patch) | |
| tree | a5585de5a559c4d86e5aba6a8c2779e24b1ef8c4 /drivers/video/fbdev | |
| parent | 3a62a31d4433c791dc45185053c1618de024b295 (diff) | |
msm: mdss: remove obsolete hw revision checks
Remove all hw revision checks related to REV_200 from
mdp driver.
Change-Id: I31c18b9c91eb93946f777a4b276aec6c999dd337
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Diffstat (limited to 'drivers/video/fbdev')
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_ctl.c | 34 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_pipe.c | 5 |
2 files changed, 4 insertions, 35 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c index fc5e3fe732d8..f545f8e8329e 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c +++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c @@ -3496,20 +3496,6 @@ static void mdss_mdp_mixer_update_pipe_map(struct mdss_mdp_ctl *master_ctl, mixer->pipe_mapped = mixer->next_pipe_map; } -static inline u32 mdss_mdp_mpq_pipe_num_map(u32 pipe_num) -{ - u32 mpq_num; - if (pipe_num == MDSS_MDP_SSPP_VIG3) - mpq_num = MDSS_MDP_SSPP_VIG2 + 1; - else if (pipe_num == MDSS_MDP_SSPP_RGB0) - mpq_num = MDSS_MDP_SSPP_VIG2 + 2; - else if (pipe_num == MDSS_MDP_SSPP_RGB1) - mpq_num = MDSS_MDP_SSPP_VIG2 + 3; - else - mpq_num = pipe_num; - return mpq_num; -} - void mdss_mdp_set_roi(struct mdss_mdp_ctl *ctl, struct mdss_rect *l_roi, struct mdss_rect *r_roi) { @@ -3541,7 +3527,7 @@ static void mdss_mdp_mixer_setup(struct mdss_mdp_ctl *master_ctl, { int i; int stage, screen_state, outsize; - u32 off, blend_op, blend_stage, mpq_num; + u32 off, blend_op, blend_stage; u32 mixercfg = 0, mixer_op_mode = 0, bg_alpha_enable = 0, mixercfg_extn = 0; u32 fg_alpha = 0, bg_alpha = 0; @@ -3586,10 +3572,7 @@ static void mdss_mdp_mixer_setup(struct mdss_mdp_ctl *master_ctl, if (pipe == NULL) { mixercfg = MDSS_MDP_LM_BORDER_COLOR; } else { - if (mdata->mdp_rev == MDSS_MDP_HW_REV_200) { - mpq_num = mdss_mdp_mpq_pipe_num_map(pipe->num); - mixercfg = 1 << (3 * mpq_num); - } else if (pipe->num == MDSS_MDP_SSPP_VIG3 || + if (pipe->num == MDSS_MDP_SSPP_VIG3 || pipe->num == MDSS_MDP_SSPP_RGB3) { /* Add 2 to account for Cursor & Border bits */ mixercfg = 1 << ((3 * pipe->num)+2); @@ -3697,10 +3680,7 @@ static void mdss_mdp_mixer_setup(struct mdss_mdp_ctl *master_ctl, if (!pipe->src_fmt->alpha_enable && bg_alpha_enable) mixer_op_mode = 0; - if (mdata->mdp_rev == MDSS_MDP_HW_REV_200) { - mpq_num = mdss_mdp_mpq_pipe_num_map(pipe->num); - mixercfg |= stage << (3 * mpq_num); - } else if ((stage < MDSS_MDP_STAGE_6) && + if ((stage < MDSS_MDP_STAGE_6) && (pipe->num == MDSS_MDP_SSPP_VIG3 || pipe->num == MDSS_MDP_SSPP_RGB3)) { /* @@ -4011,7 +3991,6 @@ int mdss_mdp_mixer_pipe_update(struct mdss_mdp_pipe *pipe, { struct mdss_mdp_ctl *ctl; int i, j, k; - u32 mpq_num; if (!pipe) return -EINVAL; @@ -4064,12 +4043,7 @@ int mdss_mdp_mixer_pipe_update(struct mdss_mdp_pipe *pipe, } } - if (ctl->mdata->mdp_rev == MDSS_MDP_HW_REV_200) { - mpq_num = mdss_mdp_mpq_pipe_num_map(pipe->num); - ctl->flush_bits |= BIT(mpq_num); - } else { - ctl->flush_bits |= mdss_mdp_get_pipe_flush_bits(pipe); - } + ctl->flush_bits |= mdss_mdp_get_pipe_flush_bits(pipe); mutex_unlock(&ctl->flush_lock); diff --git a/drivers/video/fbdev/msm/mdss_mdp_pipe.c b/drivers/video/fbdev/msm/mdss_mdp_pipe.c index ce223803a99e..32c0b2f6e525 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pipe.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pipe.c @@ -2012,11 +2012,6 @@ static int mdss_mdp_src_addr_setup(struct mdss_mdp_pipe *pipe, mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC2_ADDR, data.p[2].addr); mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC3_ADDR, data.p[3].addr); - /* Flush Sel register only exists in mpq */ - if ((mdata->mdp_rev == MDSS_MDP_HW_REV_200) && - (pipe->flags & MDP_VPU_PIPE)) - mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_VIG_FLUSH_SEL, 0); - return 0; } |
