diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2016-09-24 02:00:54 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-09-24 02:00:54 -0700 |
| commit | c480cfd424db4a62fdc5ab2ab94a149422633243 (patch) | |
| tree | 9a3205439fc052d48b499b2c080a06980d5005ed /drivers/video/fbdev/msm | |
| parent | 4b80b64e9d8a8d52e4437e558ddec4655976d9a6 (diff) | |
| parent | cdf62c6db2851a9407af4e965eb99be82c460ee6 (diff) | |
Merge "Revert "ARM: dts: msm: configure CX voltage levels from MDSS for msmcobalt""
Diffstat (limited to 'drivers/video/fbdev/msm')
| -rw-r--r-- | drivers/video/fbdev/msm/mdss.h | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp.c | 30 |
2 files changed, 31 insertions, 0 deletions
diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h index 4d03920db005..a5368cdf2254 100644 --- a/drivers/video/fbdev/msm/mdss.h +++ b/drivers/video/fbdev/msm/mdss.h @@ -163,6 +163,7 @@ enum mdss_hw_quirk { MDSS_QUIRK_FMT_PACK_PATTERN, MDSS_QUIRK_NEED_SECURE_MAP, MDSS_QUIRK_SRC_SPLIT_ALWAYS, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE, MDSS_QUIRK_MAX, }; diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index ee665ee92513..81e3438befca 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -1831,6 +1831,20 @@ static u32 mdss_get_props(void) return props; } +static void mdss_rpm_set_msg_ram(bool enable) +{ + u32 read_reg = 0; + void __iomem *rpm_msg_ram = ioremap(0x7781FC, 4); + + if (rpm_msg_ram) { + writel_relaxed(enable, rpm_msg_ram); + read_reg = readl_relaxed(rpm_msg_ram); + pr_debug("%s enable=%d read_val=%x\n", __func__, enable, + read_reg); + iounmap(rpm_msg_ram); + } +} + void mdss_mdp_init_default_prefill_factors(struct mdss_data_type *mdata) { mdata->prefill_data.prefill_factors.fmt_mt_nv12_factor = 8; @@ -2000,6 +2014,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) mdss_mdp_init_default_prefill_factors(mdata); mdss_set_quirk(mdata, MDSS_QUIRK_DSC_RIGHT_ONLY_PU); mdss_set_quirk(mdata, MDSS_QUIRK_DSC_2SLICE_PU_THRPUT); + mdss_set_quirk(mdata, MDSS_QUIRK_MMSS_GDSC_COLLAPSE); mdata->has_wb_ubwc = true; set_bit(MDSS_CAPS_10_BIT_SUPPORTED, mdata->mdss_caps_map); set_bit(MDSS_CAPS_AVR_SUPPORTED, mdata->mdss_caps_map); @@ -4885,6 +4900,13 @@ static void mdss_mdp_footswitch_ctrl(struct mdss_data_type *mdata, int on) active_cnt = atomic_read(&mdata->active_intf_cnt); if (active_cnt != 0) { /* + * Advise RPM to not turn MMSS GDSC off during + * idle case. + */ + if (mdss_has_quirk(mdata, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE)) + mdss_rpm_set_msg_ram(true); + /* * Turning off GDSC while overlays are still * active. */ @@ -4893,6 +4915,14 @@ static void mdss_mdp_footswitch_ctrl(struct mdss_data_type *mdata, int on) active_cnt); mdss_mdp_memory_retention_enter(); } else { + /* + * Advise RPM to turn MMSS GDSC off during + * suspend case + */ + if (mdss_has_quirk(mdata, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE)) + mdss_rpm_set_msg_ram(false); + mdss_mdp_cx_ctrl(mdata, false); mdss_mdp_batfet_ctrl(mdata, false); } |