diff options
| author | Ingrid Gallardo <ingridg@codeaurora.org> | 2016-03-23 12:42:15 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-28 16:44:40 -0700 |
| commit | a11766a11ddb4e95d634a3f2117899d13e8f2e01 (patch) | |
| tree | c1d189f7dbfd34154b60388d4bcc3a74b0e863e3 /drivers/video/fbdev/msm | |
| parent | 9be372639ecc6bfb301b8b2923b41d7a0be19289 (diff) | |
msm: mdss: update vbif remapper for sde 3.0
Starting with sde 3.0, vbif remapper registers
have changed. Update programming sequence
to configure vbif remapper registers accordingly.
Change-Id: I7cfac789576300f421de076ac9abca9b85c6168d
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Diffstat (limited to 'drivers/video/fbdev/msm')
| -rw-r--r-- | drivers/video/fbdev/msm/mdss.h | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp.c | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_hwio.h | 3 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_pipe.c | 60 |
4 files changed, 52 insertions, 13 deletions
diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h index a2046fd5b9cf..67012bf6d784 100644 --- a/drivers/video/fbdev/msm/mdss.h +++ b/drivers/video/fbdev/msm/mdss.h @@ -190,6 +190,7 @@ enum mdss_qos_settings { MDSS_QOS_SIMPLIFIED_PREFILL, MDSS_QOS_VBLANK_PANIC_CTRL, MDSS_QOS_TS_PREFILL, + MDSS_QOS_REMAPPER, MDSS_QOS_MAX, }; diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index 253141072795..52887b1336a0 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -1528,6 +1528,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) mdata->rects_per_sspp[MDSS_MDP_PIPE_TYPE_DMA] = 2; set_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map); + set_bit(MDSS_QOS_REMAPPER, mdata->mdss_qos_map); set_bit(MDSS_QOS_OVERHEAD_FACTOR, mdata->mdss_qos_map); set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); set_bit(MDSS_QOS_OTLIM, mdata->mdss_qos_map); diff --git a/drivers/video/fbdev/msm/mdss_mdp_hwio.h b/drivers/video/fbdev/msm/mdss_mdp_hwio.h index 6c1a286b5d7e..d98896435d98 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_hwio.h +++ b/drivers/video/fbdev/msm/mdss_mdp_hwio.h @@ -812,6 +812,9 @@ enum mdss_mdp_pingpong_index { #define MDSS_VBIF_QOS_REMAP_BASE 0x020 #define MDSS_VBIF_QOS_REMAP_ENTRIES 0x4 +#define MDSS_VBIF_QOS_RP_REMAP_BASE 0x550 +#define MDSS_VBIF_QOS_LVL_REMAP_BASE 0x570 + #define MDSS_VBIF_FIXED_SORT_EN 0x30 #define MDSS_VBIF_FIXED_SORT_SEL0 0x34 diff --git a/drivers/video/fbdev/msm/mdss_mdp_pipe.c b/drivers/video/fbdev/msm/mdss_mdp_pipe.c index a47477e2c9ef..75bd02dac1e4 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pipe.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pipe.c @@ -1005,25 +1005,59 @@ int mdss_mdp_pipe_map(struct mdss_mdp_pipe *pipe) static void mdss_mdp_qos_vbif_remapper_setup(struct mdss_data_type *mdata, struct mdss_mdp_pipe *pipe, bool is_realtime) { - u32 mask, reg_val, i, vbif_qos; + u32 mask, reg_val, reg_val_lvl, i, vbif_qos; + u32 reg_high; bool is_nrt_vbif = mdss_mdp_is_nrt_vbif_client(mdata, pipe); if (mdata->npriority_lvl == 0) return; - mutex_lock(&mdata->reg_lock); - for (i = 0; i < mdata->npriority_lvl; i++) { - reg_val = MDSS_VBIF_READ(mdata, MDSS_VBIF_QOS_REMAP_BASE + i*4, - is_nrt_vbif); - mask = 0x3 << (pipe->xin_id * 2); - reg_val &= ~(mask); - vbif_qos = is_realtime ? - mdata->vbif_rt_qos[i] : mdata->vbif_nrt_qos[i]; - reg_val |= vbif_qos << (pipe->xin_id * 2); - MDSS_VBIF_WRITE(mdata, MDSS_VBIF_QOS_REMAP_BASE + i*4, reg_val, - is_nrt_vbif); + if (test_bit(MDSS_QOS_REMAPPER, mdata->mdss_qos_map)) { + mutex_lock(&mdata->reg_lock); + for (i = 0; i < mdata->npriority_lvl; i++) { + reg_high = ((pipe->xin_id & 0x8) >> 3) * 4 + (i * 8); + + reg_val = MDSS_VBIF_READ(mdata, + MDSS_VBIF_QOS_RP_REMAP_BASE + + reg_high, is_nrt_vbif); + reg_val_lvl = MDSS_VBIF_READ(mdata, + MDSS_VBIF_QOS_LVL_REMAP_BASE + reg_high, + is_nrt_vbif); + + mask = 0x3 << (pipe->xin_id * 4); + vbif_qos = is_realtime ? + mdata->vbif_rt_qos[i] : mdata->vbif_nrt_qos[i]; + + reg_val &= ~(mask); + reg_val |= vbif_qos << (pipe->xin_id * 4); + + reg_val_lvl &= ~(mask); + reg_val_lvl |= vbif_qos << (pipe->xin_id * 4); + + pr_debug("idx:%d xin:%d reg:0x%x val:0x%x lvl:0x%x\n", + i, pipe->xin_id, reg_high, reg_val, reg_val_lvl); + MDSS_VBIF_WRITE(mdata, MDSS_VBIF_QOS_RP_REMAP_BASE + + reg_high, reg_val, is_nrt_vbif); + MDSS_VBIF_WRITE(mdata, MDSS_VBIF_QOS_LVL_REMAP_BASE + + reg_high, reg_val_lvl, is_nrt_vbif); + } + mutex_unlock(&mdata->reg_lock); + } else { + mutex_lock(&mdata->reg_lock); + for (i = 0; i < mdata->npriority_lvl; i++) { + reg_val = MDSS_VBIF_READ(mdata, + MDSS_VBIF_QOS_REMAP_BASE + i*4, is_nrt_vbif); + + mask = 0x3 << (pipe->xin_id * 2); + reg_val &= ~(mask); + vbif_qos = is_realtime ? + mdata->vbif_rt_qos[i] : mdata->vbif_nrt_qos[i]; + reg_val |= vbif_qos << (pipe->xin_id * 2); + MDSS_VBIF_WRITE(mdata, MDSS_VBIF_QOS_REMAP_BASE + i*4, + reg_val, is_nrt_vbif); + } + mutex_unlock(&mdata->reg_lock); } - mutex_unlock(&mdata->reg_lock); } /** |
