drm/msm/sde: add topology management properties

Need to expose connector properties for user interaction with
dynamic hardware resource mapping to drm object topologies.
Expose topology_control property on each connector to allow user
control reservation behavior. An immutable topology_name
property is exposed on each connector to allow user to query
active use case driver chose.

Change-Id: I97d22b9a1a8f6e0094f1148af8adb31c826a266a
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>

5 files changed, 107 insertions, 1 deletions

diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index b395ea713db6..771d6573bb73 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -124,6 +124,8 @@ enum msm_mdp_conn_property {
 	CONNECTOR_PROP_DST_H,
 
 	/* enum/bitmask properties */
+	CONNECTOR_PROP_TOPOLOGY_NAME,
+	CONNECTOR_PROP_TOPOLOGY_CONTROL,
 
 	/* total # of properties */
 	CONNECTOR_PROP_COUNT
diff --git a/drivers/gpu/drm/msm/msm_prop.c b/drivers/gpu/drm/msm/msm_prop.c
index 5c930b861822..e9550f580b11 100644
--- a/drivers/gpu/drm/msm/msm_prop.c
+++ b/drivers/gpu/drm/msm/msm_prop.c
@@ -589,3 +589,24 @@ exit:
 	return rc;
 }
 
+int msm_property_set_property(struct msm_property_info *info,
+		uint32_t property_idx,
+		uint64_t val)
+{
+	int rc = -EINVAL;
+
+	if (!info || (property_idx >= info->property_count) ||
+			property_idx < info->blob_count) {
+		DRM_ERROR("invalid argument(s)\n");
+	} else {
+		/* update drm object */
+		rc = drm_object_property_set_value(info->base,
+				info->property_array[property_idx], val);
+		if (rc)
+			DRM_ERROR("failed set property value, idx %d rc %d\n",
+					property_idx, rc);
+	}
+
+	return rc;
+}
+
diff --git a/drivers/gpu/drm/msm/msm_prop.h b/drivers/gpu/drm/msm/msm_prop.h
index c53b6dbd33f7..9a4879854bbd 100644
--- a/drivers/gpu/drm/msm/msm_prop.h
+++ b/drivers/gpu/drm/msm/msm_prop.h
@@ -346,5 +346,20 @@ int msm_property_set_blob(struct msm_property_info *info,
 		size_t byte_len,
 		uint32_t property_idx);
 
+/**
+ * msm_property_set_property - update property on a drm object
+ * This function updates the property value of the given drm object. Its
+ * intended use is to update properties that have been created with the
+ * DRM_MODE_PROP_IMMUTABLE flag set.
+ * Note: This function cannot be called on a blob.
+ * @info: Pointer to property info container struct
+ * @property_idx: Property index
+ * @val: value of the property to set
+ * Returns: Zero on success
+ */
+int msm_property_set_property(struct msm_property_info *info,
+		uint32_t property_idx,
+		uint64_t val);
+
 #endif /* _MSM_PROP_H_ */
 
diff --git a/drivers/gpu/drm/msm/sde/sde_connector.c b/drivers/gpu/drm/msm/sde/sde_connector.c
index 1b86f00e5647..a39b994d6fbf 100644
--- a/drivers/gpu/drm/msm/sde/sde_connector.c
+++ b/drivers/gpu/drm/msm/sde/sde_connector.c
@@ -16,6 +16,21 @@
 #include "sde_kms.h"
 #include "sde_connector.h"
 
+static const struct drm_prop_enum_list e_topology_name[] = {
+	{SDE_RM_TOPOLOGY_UNKNOWN,	"sde_unknown"},
+	{SDE_RM_TOPOLOGY_SINGLEPIPE,	"sde_singlepipe"},
+	{SDE_RM_TOPOLOGY_DUALPIPE,	"sde_dualpipe"},
+	{SDE_RM_TOPOLOGY_PPSPLIT,	"sde_ppsplit"},
+	{SDE_RM_TOPOLOGY_DUALPIPEMERGE,	"sde_dualpipemerge"}
+};
+static const struct drm_prop_enum_list e_topology_control[] = {
+	{SDE_RM_TOPCTL_RESERVE_LOCK,	"reserve_lock"},
+	{SDE_RM_TOPCTL_RESERVE_CLEAR,	"reserve_clear"},
+	{SDE_RM_TOPCTL_DSPP,		"dspp"},
+	{SDE_RM_TOPCTL_FORCE_TILING,	"force_tiling"},
+	{SDE_RM_TOPCTL_PPSPLIT,		"ppsplit"}
+};
+
 int sde_connector_get_info(struct drm_connector *connector,
 		struct msm_display_info *info)
 {
@@ -554,12 +569,25 @@ struct drm_connector *sde_connector_init(struct drm_device *dev,
 	msm_property_install_range(&c_conn->property_info, "RETIRE_FENCE",
 			0x0, 0, ~0, ~0, CONNECTOR_PROP_RETIRE_FENCE);
 
+	/* enum/bitmask properties */
+	msm_property_install_enum(&c_conn->property_info, "topology_name",
+			DRM_MODE_PROP_IMMUTABLE, 0, e_topology_name,
+			ARRAY_SIZE(e_topology_name),
+			CONNECTOR_PROP_TOPOLOGY_NAME);
+	msm_property_install_enum(&c_conn->property_info, "topology_control",
+			0, 1, e_topology_control,
+			ARRAY_SIZE(e_topology_control),
+			CONNECTOR_PROP_TOPOLOGY_CONTROL);
+
 	rc = msm_property_install_get_status(&c_conn->property_info);
 	if (rc) {
 		SDE_ERROR("failed to create one or more properties\n");
 		goto error_destroy_property;
 	}
 
+	SDE_DEBUG("connector %d attach encoder %d\n",
+			c_conn->base.base.id, encoder->base.id);
+
 	priv->connectors[priv->num_connectors++] = &c_conn->base;
 
 	return &c_conn->base;
@@ -579,4 +607,3 @@ error_free_conn:
 
 	return ERR_PTR(rc);
 }
-
diff --git a/drivers/gpu/drm/msm/sde/sde_kms.h b/drivers/gpu/drm/msm/sde/sde_kms.h
index f465fef0a6cb..d04dd6053cae 100644
--- a/drivers/gpu/drm/msm/sde/sde_kms.h
+++ b/drivers/gpu/drm/msm/sde/sde_kms.h
@@ -51,6 +51,47 @@
 
 #define SDE_ERROR(fmt, ...) pr_err(fmt, ##__VA_ARGS__)
 
+/**
+ * enum sde_rm_topology_name - HW resource use case in use by connector
+ * @SDE_RM_TOPOLOGY_UNKNOWN: No topology in use currently
+ * @SDE_RM_TOPOLOGY_SINGLEPIPE: 1 LM, 1 PP, 1 INTF/WB
+ * @SDE_RM_TOPOLOGY_DUALPIPE: 2 LM, 2 PP, 2 INTF/WB
+ * @SDE_RM_TOPOLOGY_PPSPLIT: 1 LM, 2 PPs, 2 INTF/WB
+ * @SDE_RM_TOPOLOGY_DUALPIPEMERGE: 2 LM, 2 PP, 3DMux, 1 INTF/WB
+ */
+enum sde_rm_topology_name {
+	SDE_RM_TOPOLOGY_UNKNOWN = 0,
+	SDE_RM_TOPOLOGY_SINGLEPIPE,
+	SDE_RM_TOPOLOGY_DUALPIPE,
+	SDE_RM_TOPOLOGY_PPSPLIT,
+	SDE_RM_TOPOLOGY_DUALPIPEMERGE,
+};
+
+/**
+ * enum sde_rm_topology_control - HW resource use case in use by connector
+ * @SDE_RM_TOPCTL_RESERVE_LOCK: If set, in AtomicTest phase, after a successful
+ *                              test, reserve the resources for this display.
+ *                              Normal behavior would not impact the reservation
+ *                              list during the AtomicTest phase.
+ * @SDE_RM_TOPCTL_RESERVE_CLEAR: If set, in AtomicTest phase, before testing,
+ *                               release any reservation held by this display.
+ *                               Normal behavior would not impact the
+ *                               reservation list during the AtomicTest phase.
+ * @SDE_RM_TOPCTL_DSPP: Require layer mixers with DSPP capabilities
+ * @SDE_RM_TOPCTL_FORCE_TILING: Require kernel to split across multiple layer
+ *                              mixers, despite width fitting within capability
+ *                              of a single layer mixer.
+ * @SDE_RM_TOPCTL_PPSPLIT: Require kernel to use pingpong split pipe
+ *                         configuration instead of dual pipe.
+ */
+enum sde_rm_topology_control {
+	SDE_RM_TOPCTL_RESERVE_LOCK,
+	SDE_RM_TOPCTL_RESERVE_CLEAR,
+	SDE_RM_TOPCTL_DSPP,
+	SDE_RM_TOPCTL_FORCE_TILING,
+	SDE_RM_TOPCTL_PPSPLIT,
+};
+
 /*
  * struct sde_irq_callback - IRQ callback handlers
  * @func: intr handler