diff options
| author | Abhinav Kumar <abhinavk@codeaurora.org> | 2017-06-07 02:19:43 -0700 |
|---|---|---|
| committer | Abhinav Kumar <abhinavk@codeaurora.org> | 2017-06-07 02:45:08 -0700 |
| commit | d9bdeba0e1f24b47b9f9cd6c11d6adf766291d79 (patch) | |
| tree | 6e0f00c05d251fb3f9cd3ba593a7310c308d2f85 /drivers/gpu | |
| parent | ccde34ffb3f4e58f6885a6489c7e2eaeb7eca5e9 (diff) | |
drm/msm : fix hdmi controller register programming
Currently, there is an incorrect programming of the
hdmi controller register where default value of the
datapath mode bit is being toggled along with the
scrambler enable/disable.
This bit should be untouched as per the hardware
programming sequence and kept at the default state.
Fix the register programming to avoid toggling this
bit.
Change-Id: I2e8f74c0abaddd27b5d8a2136afc4e1b82f96e7d
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c index 34268aaedfc0..26a0638f7792 100644 --- a/drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c +++ b/drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_bridge.c @@ -328,7 +328,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi, } reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); - reg_val |= BIT(31); /* Enable Update DATAPATH_MODE */ reg_val |= BIT(28); /* Set SCRAMBLER_EN bit */ hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); @@ -360,7 +359,6 @@ static int _sde_hdmi_bridge_setup_scrambler(struct hdmi *hdmi, } else { sde_hdmi_scdc_write(hdmi, HDMI_TX_SCDC_SCRAMBLING_ENABLE, 0x0); reg_val = hdmi_read(hdmi, REG_HDMI_CTRL); - reg_val &= ~BIT(31); /* Disable Update DATAPATH_MODE */ reg_val &= ~BIT(28); /* Unset SCRAMBLER_EN bit */ hdmi_write(hdmi, REG_HDMI_CTRL, reg_val); } |