drm/msm: use sde specific color format throughout

Move sde_kms to register its own color format structure for get_format
to consolidate all format definitions. Also, make sde_format structure
compatible with mdp_format by having a common msm_format base.

Change-Id: I79bd4e84633618865456c0d21bcace67c3c8cb80
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>

16 files changed, 296 insertions, 194 deletions

diff --git a/drivers/gpu/drm/msm/mdp/mdp_format.c b/drivers/gpu/drm/msm/mdp/mdp_format.c
index 1c2caffc97e4..d2fa72815833 100644
--- a/drivers/gpu/drm/msm/mdp/mdp_format.c
+++ b/drivers/gpu/drm/msm/mdp/mdp_format.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014,2016 The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <robdclark@gmail.com>
  *
@@ -165,7 +165,11 @@ uint32_t mdp_get_formats(uint32_t *pixel_formats, uint32_t max_formats,
 	return i;
 }
 
-const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format)
+const struct msm_format *mdp_get_format(
+		struct msm_kms *kms,
+		uint32_t format,
+		const uint64_t *modifiers,
+		uint32_t modifiers_len)
 {
 	int i;
 	for (i = 0; i < ARRAY_SIZE(formats); i++) {
diff --git a/drivers/gpu/drm/msm/mdp/mdp_kms.h b/drivers/gpu/drm/msm/mdp/mdp_kms.h
index 303130320748..0d0723d32a03 100644
--- a/drivers/gpu/drm/msm/mdp/mdp_kms.h
+++ b/drivers/gpu/drm/msm/mdp/mdp_kms.h
@@ -98,7 +98,9 @@ struct mdp_format {
 #define MDP_FORMAT_IS_YUV(mdp_format) ((mdp_format)->is_yuv)
 
 uint32_t mdp_get_formats(uint32_t *formats, uint32_t max_formats, bool rgb_only);
-const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format);
+const struct msm_format *mdp_get_format(struct msm_kms *kms,
+		uint32_t format, const uint64_t *modifiers,
+		uint32_t modifiers_len);
 
 /* MDP capabilities */
 #define MDP_CAP_SMP		BIT(0)	/* Shared Memory Pool                 */
diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c
index 121713281417..1de4766290a3 100644
--- a/drivers/gpu/drm/msm/msm_fb.c
+++ b/drivers/gpu/drm/msm/msm_fb.c
@@ -175,18 +175,19 @@ struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
 	struct msm_framebuffer *msm_fb = NULL;
 	struct drm_framebuffer *fb;
 	const struct msm_format *format;
-	int ret, i, n;
+	int ret, i, num_planes;
 	unsigned int hsub, vsub;
 
 	DBG("create framebuffer: dev=%p, mode_cmd=%p (%dx%d@%4.4s)",
 			dev, mode_cmd, mode_cmd->width, mode_cmd->height,
 			(char *)&mode_cmd->pixel_format);
 
-	n = drm_format_num_planes(mode_cmd->pixel_format);
+	num_planes = drm_format_num_planes(mode_cmd->pixel_format);
 	hsub = drm_format_horz_chroma_subsampling(mode_cmd->pixel_format);
 	vsub = drm_format_vert_chroma_subsampling(mode_cmd->pixel_format);
 
-	format = kms->funcs->get_format(kms, mode_cmd->pixel_format);
+	format = kms->funcs->get_format(kms, mode_cmd->pixel_format,
+			mode_cmd->modifier, num_planes);
 	if (!format) {
 		dev_err(dev->dev, "unsupported pixel format: %4.4s\n",
 				(char *)&mode_cmd->pixel_format);
@@ -204,12 +205,12 @@ struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
 
 	msm_fb->format = format;
 
-	if (n > ARRAY_SIZE(msm_fb->planes)) {
+	if (num_planes > ARRAY_SIZE(msm_fb->planes)) {
 		ret = -EINVAL;
 		goto fail;
 	}
 
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < num_planes; i++) {
 		unsigned int width = mode_cmd->width / (i ? hsub : 1);
 		unsigned int height = mode_cmd->height / (i ? vsub : 1);
 		unsigned int min_size;
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index bbf9fa3fd508..87640d514840 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -55,8 +55,12 @@ struct msm_kms_funcs {
 	/* functions to wait for atomic commit completed on each CRTC */
 	void (*wait_for_crtc_commit_done)(struct msm_kms *kms,
 					struct drm_crtc *crtc);
+	/* get msm_format w/ optional format modifiers from drm_mode_fb_cmd2 */
+	const struct msm_format *(*get_format)(struct msm_kms *kms,
+					const uint32_t format,
+					const uint64_t *modifiers,
+					const uint32_t modifiers_len);
 	/* misc: */
-	const struct msm_format *(*get_format)(struct msm_kms *kms, uint32_t format);
 	long (*round_pixclk)(struct msm_kms *kms, unsigned long rate,
 			struct drm_encoder *encoder);
 	int (*set_split_display)(struct msm_kms *kms,
diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
index 7f9afe8626bd..25b0ac070460 100644
--- a/drivers/gpu/drm/msm/sde/sde_crtc.c
+++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
@@ -175,10 +175,10 @@ static void sde_crtc_get_blend_cfg(struct sde_hw_blend_cfg *cfg,
 		struct sde_plane_state *pstate)
 {
 	struct drm_plane *plane;
-	const struct mdp_format *format;
+	const struct sde_format *format;
 	uint32_t blend_op;
 
-	format = to_mdp_format(
+	format = to_sde_format(
 			msm_framebuffer_format(pstate->base.fb));
 	plane = pstate->base.plane;
 
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
index ec51a5653dbb..655a170b1e9a 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
@@ -239,9 +239,8 @@ static void sde_encoder_phys_vid_setup_timing_engine(
 {
 	struct drm_display_mode mode = phys_enc->cached_mode;
 	struct intf_timing_params timing_params = { 0 };
-	struct sde_mdp_format_params *fmt_params = NULL;
+	const struct sde_format *fmt = NULL;
 	u32 fmt_fourcc = DRM_FORMAT_RGB888;
-	u32 fmt_mod = 0;
 	unsigned long lock_flags;
 	struct sde_hw_intf_cfg intf_cfg = { 0 };
 
@@ -269,15 +268,15 @@ static void sde_encoder_phys_vid_setup_timing_engine(
 
 	drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params);
 
-	fmt_params = sde_mdp_get_format_params(fmt_fourcc, fmt_mod);
-	DBG("fmt_fourcc %d, fmt_mod %d", fmt_fourcc, fmt_mod);
+	fmt = sde_get_sde_format(fmt_fourcc);
+	DBG("fmt_fourcc %d", fmt_fourcc);
 
 	intf_cfg.intf = phys_enc->hw_intf->idx;
 	intf_cfg.wb = SDE_NONE;
 
 	spin_lock_irqsave(&phys_enc->spin_lock, lock_flags);
 	phys_enc->hw_intf->ops.setup_timing_gen(phys_enc->hw_intf,
-			&timing_params, fmt_params);
+			&timing_params, fmt);
 	phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg);
 	spin_unlock_irqrestore(&phys_enc->spin_lock, lock_flags);
 
diff --git a/drivers/gpu/drm/msm/sde/sde_formats.c b/drivers/gpu/drm/msm/sde/sde_formats.c
index a32a6b88b6a3..78d672ee8fd5 100644
--- a/drivers/gpu/drm/msm/sde/sde_formats.c
+++ b/drivers/gpu/drm/msm/sde/sde_formats.c
@@ -13,122 +13,184 @@
 #include "sde_kms.h"
 #include "sde_formats.h"
 
-static struct sde_mdp_format_params sde_mdp_format_map[] = {
+static struct sde_format sde_format_map[] = {
 	INTERLEAVED_RGB_FMT(ARGB8888,
 		COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA,
+		C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
 		true, 4, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(ABGR8888,
 		COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA,
+		C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
 		true, 4, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(RGBA8888,
 		COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr,
+		C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
 		true, 4, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(BGRA8888,
 		COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb,
+		C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
 		true, 4, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(XRGB8888,
 		COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA,
-		true, 4, SDE_FORMAT_FLAG_ROTATOR),
+		C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
+		false, 4, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(RGB888,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C1_B_Cb, C0_G_Y, C2_R_Cr, 0,
+		C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
 		false, 3, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(BGR888,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
-		C2_R_Cr, C0_G_Y, C1_B_Cb, 0,
+		C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
 		false, 3, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(RGB565,
 		0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
-		C1_B_Cb, C0_G_Y, C2_R_Cr, 0,
+		C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
 		false, 2, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_RGB_FMT(BGR565,
-		0, 5, 6, 5,
-		C2_R_Cr, C0_G_Y, C1_B_Cb, 0,
+		0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
+		C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
 		false, 2, SDE_FORMAT_FLAG_ROTATOR),
 
 	PSEDUO_YUV_FMT(NV12,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C1_B_Cb, C2_R_Cr,
-		SDE_MDP_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
+		SDE_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
 
 	PSEDUO_YUV_FMT(NV21,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C2_R_Cr, C1_B_Cb,
-		SDE_MDP_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
+		SDE_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
 
 	PSEDUO_YUV_FMT(NV16,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C1_B_Cb, C2_R_Cr,
-		SDE_MDP_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
+		SDE_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
 
 	PSEDUO_YUV_FMT(NV61,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C2_R_Cr, C1_B_Cb,
-		SDE_MDP_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
+		SDE_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
 
 	INTERLEAVED_YUV_FMT(VYUY,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C2_R_Cr, C0_G_Y, C1_B_Cb, C0_G_Y,
-		false, SDE_MDP_CHROMA_H2V1, 4, 2,
+		false, SDE_CHROMA_H2V1, 4, 2,
 		0),
 
 	INTERLEAVED_YUV_FMT(UYVY,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C1_B_Cb, C0_G_Y, C2_R_Cr, C0_G_Y,
-		false, SDE_MDP_CHROMA_H2V1, 4, 2,
+		false, SDE_CHROMA_H2V1, 4, 2,
 		0),
 
 	INTERLEAVED_YUV_FMT(YUYV,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C0_G_Y, C1_B_Cb, C0_G_Y, C2_R_Cr,
-		false, SDE_MDP_CHROMA_H2V1, 4, 2,
+		false, SDE_CHROMA_H2V1, 4, 2,
 		0),
 
 	INTERLEAVED_YUV_FMT(YVYU,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C0_G_Y, C2_R_Cr, C0_G_Y, C1_B_Cb,
-		false, SDE_MDP_CHROMA_H2V1, 4, 2,
+		false, SDE_CHROMA_H2V1, 4, 2,
 		0),
 
 	PLANAR_YUV_FMT(YUV420,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C2_R_Cr, C1_B_Cb, C0_G_Y,
-		false, SDE_MDP_CHROMA_420, 2,
+		false, SDE_CHROMA_420, 2,
 		SDE_FORMAT_FLAG_ROTATOR),
 
 	PLANAR_YUV_FMT(YVU420,
 		0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
 		C1_B_Cb, C2_R_Cr, C0_G_Y,
-		false, SDE_MDP_CHROMA_420, 2,
+		false, SDE_CHROMA_420, 2,
 		SDE_FORMAT_FLAG_ROTATOR),
 };
 
-struct sde_mdp_format_params *sde_mdp_get_format_params(u32 format,
-		u32 fmt_modifier)
+const struct sde_format *sde_get_sde_format_ext(
+		const uint32_t format,
+		const uint64_t *modifiers,
+		const uint32_t modifiers_len)
 {
 	u32 i = 0;
-	struct sde_mdp_format_params *fmt = NULL;
+	uint64_t modifier = 0;
+	struct sde_format *fmt = NULL;
+
+	/*
+	 * Currently only support exactly zero or one modifier, and it must be
+	 * identical for all planes
+	 */
+	if ((modifiers_len && !modifiers) || (!modifiers_len && modifiers)) {
+		DRM_ERROR("unexpected modifiers array or len\n");
+		return NULL;
+	} else if (modifiers && modifiers_len) {
+		modifier = modifiers[0];
+		for (i = 0; i < modifiers_len; i++) {
+			if (modifiers[i])
+				DBG("plane %d format modifier 0x%llX", i,
+					modifiers[i]);
+
+			if (modifiers[i] != modifier) {
+				DRM_ERROR("bad fmt mod 0x%llX on plane %d\n",
+					modifiers[i], i);
+				return NULL;
+			}
+		}
+	}
 
-	for (i = 0; i < sizeof(sde_mdp_format_map)/sizeof(*sde_mdp_format_map);
-			i++)
-		if (format == sde_mdp_format_map[i].format) {
-			fmt = &sde_mdp_format_map[i];
+	for (i = 0; i < ARRAY_SIZE(sde_format_map); i++)
+		if (format == sde_format_map[i].base.pixel_format) {
+			fmt = &sde_format_map[i];
 			break;
 		}
 
+	if (fmt == NULL)
+		DRM_ERROR("unsupported fmt 0x%X modifier 0x%llX\n",
+				format, modifier);
+	else
+		DBG("found fmt 0x%X modifier 0x%llX", format, modifier);
+
 	return fmt;
 }
 
+const struct msm_format *sde_get_msm_format(
+		struct msm_kms *kms,
+		const uint32_t format,
+		const uint64_t *modifiers,
+		const uint32_t modifiers_len)
+{
+	const struct sde_format *fmt = sde_get_sde_format_ext(format,
+			modifiers, modifiers_len);
+	if (fmt)
+		return &fmt->base;
+	return NULL;
+}
+
+uint32_t sde_populate_formats(uint32_t *pixel_formats,
+		uint32_t pixel_formats_max, bool rgb_only)
+{
+	uint32_t i;
+
+	for (i = 0; i < ARRAY_SIZE(sde_format_map); i++) {
+		const struct sde_format *fmt = &sde_format_map[i];
+
+		if (i == pixel_formats_max)
+			break;
+
+		if (rgb_only && SDE_FORMAT_IS_YUV(fmt))
+			continue;
+
+		pixel_formats[i] = fmt->base.pixel_format;
+	}
+
+	return i;
+}
diff --git a/drivers/gpu/drm/msm/sde/sde_formats.h b/drivers/gpu/drm/msm/sde/sde_formats.h
index fd7dadd07369..545633b9011c 100644
--- a/drivers/gpu/drm/msm/sde/sde_formats.h
+++ b/drivers/gpu/drm/msm/sde/sde_formats.h
@@ -24,35 +24,36 @@
 #define SDE_FORMAT_IS_UBWC(X)       ((X)->flag & SDE_FORMAT_FLAG_UBWC)
 
 /**
- * MDP supported format packing, bpp, and other format
+ * SDE supported format packing, bpp, and other format
  * information.
- * MDP currently only supports interleaved RGB formats
+ * SDE currently only supports interleaved RGB formats
  * UBWC support for a pixel format is indicated by the flag,
  * there is additional meta data plane for such formats
  */
 
-#define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, alpha, bp, flg) \
+#define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, uc, alpha,   \
+bp, flg)                                                                  \
 {                                                                         \
-	.format = DRM_FORMAT_ ## fmt,                                     \
-	.fetch_planes = SDE_MDP_PLANE_INTERLEAVED,                        \
+	.base.pixel_format = DRM_FORMAT_ ## fmt,                          \
+	.fetch_planes = SDE_PLANE_INTERLEAVED,                            \
 	.alpha_enable = alpha,                                            \
 	.element = { (e0), (e1), (e2), (e3) },                            \
 	.bits = { g, b, r, a },                                           \
-	.chroma_sample = SDE_MDP_CHROMA_RGB,                              \
+	.chroma_sample = SDE_CHROMA_RGB,                                  \
 	.unpack_align_msb = 0,                                            \
 	.unpack_tight = 1,                                                \
-	.unpack_count = (alpha == true) ? 4 : 3,                          \
+	.unpack_count = uc,                                               \
 	.bpp = bp,                                                        \
-	.fetch_mode = SDE_MDP_FETCH_LINEAR,                               \
+	.fetch_mode = SDE_FETCH_LINEAR,                                   \
 	.is_yuv = false,                                                  \
-	.flag = flg                                                      \
+	.flag = flg                                                       \
 }
 
-#define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3,               \
-alpha, chroma, count, bp, flg)                                          \
+#define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3,              \
+alpha, chroma, count, bp, flg)                                            \
 {                                                                         \
-	.format = DRM_FORMAT_ ## fmt,                                     \
-	.fetch_planes = SDE_MDP_PLANE_INTERLEAVED,                        \
+	.base.pixel_format = DRM_FORMAT_ ## fmt,                          \
+	.fetch_planes = SDE_PLANE_INTERLEAVED,                            \
 	.alpha_enable = alpha,                                            \
 	.element = { (e0), (e1), (e2), (e3)},                             \
 	.bits = { g, b, r, a },                                           \
@@ -60,16 +61,16 @@ alpha, chroma, count, bp, flg)                                          \
 	.unpack_align_msb = 0,                                            \
 	.unpack_tight = 1,                                                \
 	.unpack_count = count,                                            \
-	.bpp = bp,                                                       \
-	.fetch_mode = SDE_MDP_FETCH_LINEAR,                               \
+	.bpp = bp,                                                        \
+	.fetch_mode = SDE_FETCH_LINEAR,                                   \
 	.is_yuv = true,                                                   \
-	.flag = flg                                                      \
+	.flag = flg                                                       \
 }
 
-#define PSEDUO_YUV_FMT(fmt, a, r, g, b, e0, e1, chroma, flg)             \
+#define PSEDUO_YUV_FMT(fmt, a, r, g, b, e0, e1, chroma, flg)              \
 {                                                                         \
-	.format = DRM_FORMAT_ ## fmt,                                     \
-	.fetch_planes = SDE_MDP_PLANE_PSEUDO_PLANAR,                      \
+	.base.pixel_format = DRM_FORMAT_ ## fmt,                          \
+	.fetch_planes = SDE_PLANE_PSEUDO_PLANAR,                          \
 	.alpha_enable = false,                                            \
 	.element = { (e0), (e1), 0, 0 },                                  \
 	.bits = { g, b, r, a },                                           \
@@ -78,34 +79,66 @@ alpha, chroma, count, bp, flg)                                          \
 	.unpack_tight = 1,                                                \
 	.unpack_count = 2,                                                \
 	.bpp = 2,                                                         \
-	.fetch_mode = SDE_MDP_FETCH_LINEAR,                               \
+	.fetch_mode = SDE_FETCH_LINEAR,                                   \
 	.is_yuv = true,                                                   \
-	.flag = flg                                                      \
+	.flag = flg                                                       \
 }
 
 #define PLANAR_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, alpha, chroma, bp, flg)\
-{                                                                            \
-	.format = DRM_FORMAT_ ## fmt,                                        \
-	.fetch_planes = SDE_MDP_PLANE_INTERLEAVED,                           \
-	.alpha_enable = alpha,                                               \
+{                                                                         \
+	.base.pixel_format = DRM_FORMAT_ ## fmt,                          \
+	.fetch_planes = SDE_PLANE_INTERLEAVED,                            \
+	.alpha_enable = alpha,                                            \
 	.element = { (e0), (e1), (e2), 0 },                               \
-	.bits = { g, b, r, a },                                              \
-	.chroma_sample = chroma,                                             \
-	.unpack_align_msb = 0,                                               \
-	.unpack_tight = 1,                                                   \
-	.unpack_count = 0,                                                   \
-	.bpp = bp,                                                          \
-	.fetch_mode = SDE_MDP_FETCH_LINEAR,                                  \
-	.is_yuv = true,                                                      \
-	.flag = flg                                                         \
+	.bits = { g, b, r, a },                                           \
+	.chroma_sample = chroma,                                          \
+	.unpack_align_msb = 0,                                            \
+	.unpack_tight = 1,                                                \
+	.unpack_count = 0,                                                \
+	.bpp = bp,                                                        \
+	.fetch_mode = SDE_FETCH_LINEAR,                                   \
+	.is_yuv = true,                                                   \
+	.flag = flg                                                       \
 }
 
 /**
- * sde_mdp_get_format_params(): Returns sde format structure pointer.
- * @format:  DRM format
- * @fmt_modifier: DRM format modifier
+ * sde_get_sde_format_ext(): Returns sde format structure pointer.
+ * @format:          DRM FourCC Code
+ * @modifiers:       format modifier array from client, one per plane
+ * @modifiers_len:   number of planes and array size for plane_modifiers
+ */
+const struct sde_format *sde_get_sde_format_ext(
+		const uint32_t format,
+		const uint64_t *modifiers,
+		const uint32_t modifiers_len);
+
+#define sde_get_sde_format(f) sde_get_sde_format_ext(f, NULL, 0)
+
+/**
+ * sde_get_msm_format: get an sde_format by its msm_format base
+ *                     callback function registers with the msm_kms layer
+ * @kms:             kms driver
+ * @format:          DRM FourCC Code
+ * @modifiers:       format modifier array from client, one per plane
+ * @modifiers_len:   number of planes and array size for plane_modifiers
+ */
+const struct msm_format *sde_get_msm_format(
+		struct msm_kms *kms,
+		const uint32_t format,
+		const uint64_t *modifiers,
+		const uint32_t modifiers_len);
+
+/**
+ * sde_populate_formats: populate the given array with fourcc codes supported
+ * @pixel_formats:   array to populate with fourcc codes
+ * @max_formats:     length of pixel formats array
+ * @rgb_only:        exclude any non-rgb formats from the list
+ *
+ * Return: number of elements populated
  */
-struct sde_mdp_format_params *sde_mdp_get_format_params(u32 format,
-		u32 fmt_modifier);
+uint32_t sde_populate_formats(
+		uint32_t *pixel_formats,
+		uint32_t max_formats,
+		bool rgb_only);
 
 #endif /*_SDE_FORMATS_H */
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_cdm.c b/drivers/gpu/drm/msm/sde/sde_hw_cdm.c
index 3a222e2f8cd8..77cddba9e59e 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_cdm.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_cdm.c
@@ -218,7 +218,7 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx,
 		struct sde_hw_cdm_cfg *cdm)
 {
 	struct sde_hw_blk_reg_map *c = &ctx->hw;
-	struct sde_mdp_format_params *fmt = cdm->output_fmt;
+	struct sde_format *fmt = cdm->output_fmt;
 	u32 opmode = 0;
 	u32 cdm_enable = 0;
 	u32 csc = 0;
@@ -227,7 +227,7 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx,
 		return 0;
 
 	if (cdm->output_type == CDM_CDWN_OUTPUT_HDMI) {
-		if (fmt->chroma_sample != SDE_MDP_CHROMA_H1V2)
+		if (fmt->chroma_sample != SDE_CHROMA_H1V2)
 			return -EINVAL; /*unsupported format */
 		opmode = BIT(0);
 		opmode |= (fmt->chroma_sample << 1);
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_cdm.h b/drivers/gpu/drm/msm/sde/sde_hw_cdm.h
index d606ef5e9aa4..dfec7e0c21c0 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_cdm.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_cdm.h
@@ -23,7 +23,7 @@ struct sde_hw_cdm_cfg {
 	u32 output_bit_depth;
 	u32 h_cdwn_type;
 	u32 v_cdwn_type;
-	struct sde_mdp_format_params *output_fmt;
+	struct sde_format *output_fmt;
 	u32 output_type;
 	int flags;
 };
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_intf.c b/drivers/gpu/drm/msm/sde/sde_hw_intf.c
index 49b526ed09cf..77142bbec228 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_intf.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_intf.c
@@ -84,8 +84,8 @@ static struct sde_intf_cfg *_intf_offset(enum sde_intf intf,
 }
 
 static void sde_hw_intf_setup_timing_engine(struct sde_hw_intf *ctx,
-		struct intf_timing_params *p,
-		struct sde_mdp_format_params *fmt)
+		const struct intf_timing_params *p,
+		const struct sde_format *fmt)
 {
 	struct sde_hw_blk_reg_map *c = &ctx->hw;
 	u32 hsync_period, vsync_period;
@@ -201,7 +201,7 @@ static void sde_hw_intf_enable_timing_engine(
 
 static void sde_hw_intf_setup_prg_fetch(
 		struct sde_hw_intf *intf,
-		struct intf_prog_fetch *fetch)
+		const struct intf_prog_fetch *fetch)
 {
 	struct sde_hw_blk_reg_map *c = &intf->hw;
 	int fetch_enable;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_intf.h b/drivers/gpu/drm/msm/sde/sde_hw_intf.h
index 95b6ce1d513a..de2f2a63ecb9 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_intf.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_intf.h
@@ -62,11 +62,11 @@ struct intf_status {
  */
 struct sde_hw_intf_ops {
 	void (*setup_timing_gen)(struct sde_hw_intf *intf,
-			struct intf_timing_params *p,
-			struct sde_mdp_format_params *fmt);
+			const struct intf_timing_params *p,
+			const struct sde_format *fmt);
 
 	void (*setup_prg_fetch)(struct sde_hw_intf *intf,
-			struct intf_prog_fetch *fetch);
+			const struct intf_prog_fetch *fetch);
 
 	void (*enable_timing)(struct sde_hw_intf *intf,
 			u8 enable);
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
index e8d0b81a320a..012fe6490e36 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
@@ -16,6 +16,8 @@
 #include <linux/kernel.h>
 #include <linux/err.h>
 
+#include "msm_drv.h"
+
 #define SDE_NONE                        0
 
 #ifndef SDE_CSC_MATRIX_COEFF_SIZE
@@ -185,7 +187,7 @@ enum sde_wd_timer {
 };
 
 /**
- * MDP HW,Component order color map
+ * SDE HW,Component order color map
  */
 enum {
 	C0_G_Y = 0,
@@ -195,43 +197,42 @@ enum {
 };
 
 /**
- * enum sde_mdp_plane_type - defines how the color component pixel packing
- * @SDE_MDP_PLANE_INTERLEAVED   : Color components in single plane
- * @SDE_MDP_PLANE_PLANAR        : Color component in separate planes
- * @SDE_MDP_PLANE_PSEUDO_PLANAR : Chroma components interleaved in separate
- *                                plane
+ * enum sde_plane_type - defines how the color component pixel packing
+ * @SDE_PLANE_INTERLEAVED   : Color components in single plane
+ * @SDE_PLANE_PLANAR        : Color component in separate planes
+ * @SDE_PLANE_PSEUDO_PLANAR : Chroma components interleaved in separate plane
  */
-enum sde_mdp_plane_type {
-	SDE_MDP_PLANE_INTERLEAVED,
-	SDE_MDP_PLANE_PLANAR,
-	SDE_MDP_PLANE_PSEUDO_PLANAR,
+enum sde_plane_type {
+	SDE_PLANE_INTERLEAVED,
+	SDE_PLANE_PLANAR,
+	SDE_PLANE_PSEUDO_PLANAR,
 };
 
 /**
- * enum sde_mdp_chroma_samp_type - chroma sub-samplng type
- * @SDE_MDP_CHROMA_RGB   : no chroma subsampling
- * @SDE_MDP_CHROMA_H2V1  : chroma pixels are horizontally subsampled
- * @SDE_MDP_CHROMA_H1V2  : chroma pixels are vertically subsampled
- * @SDE_MDP_CHROMA_420   : 420 subsampling
+ * enum sde_chroma_samp_type - chroma sub-samplng type
+ * @SDE_CHROMA_RGB   : No chroma subsampling
+ * @SDE_CHROMA_H2V1  : Chroma pixels are horizontally subsampled
+ * @SDE_CHROMA_H1V2  : Chroma pixels are vertically subsampled
+ * @SDE_CHROMA_420   : 420 subsampling
  */
-enum sde_mdp_chroma_samp_type {
-	SDE_MDP_CHROMA_RGB,
-	SDE_MDP_CHROMA_H2V1,
-	SDE_MDP_CHROMA_H1V2,
-	SDE_MDP_CHROMA_420
+enum sde_chroma_samp_type {
+	SDE_CHROMA_RGB,
+	SDE_CHROMA_H2V1,
+	SDE_CHROMA_H1V2,
+	SDE_CHROMA_420
 };
 
 /**
- * enum sde_mdp_fetch_type - format id, used by drm-driver only to map drm forcc
- * Defines How MDP HW fetches data
- * @SDE_MDP_FETCH_LINEAR   : fetch is line by line
- * @SDE_MDP_FETCH_TILE     : fetches data in Z order from a tile
- * @SDE_MDP_FETCH_UBWC     : fetch and decompress data
+ * enum sde_fetch_type - format id, used by drm-driver only to map drm forcc
+ * Defines How HW fetches data
+ * @SDE_FETCH_LINEAR   : Fetch is line by line
+ * @SDE_FETCH_TILE     : Fetches data in Z order from a tile
+ * @SDE_FETCH_UBWC     : Fetch and decompress data
  */
-enum sde_mdp_fetch_type {
-	SDE_MDP_FETCH_LINEAR,
-	SDE_MDP_FETCH_TILE,
-	SDE_MDP_FETCH_UBWC
+enum sde_fetch_type {
+	SDE_FETCH_LINEAR,
+	SDE_FETCH_TILE,
+	SDE_FETCH_UBWC
 };
 
 /**
@@ -278,36 +279,38 @@ struct addr_info {
 };
 
 /**
- * struct sde_mdp_format_params - defines the format configuration which
- * allows MDP HW to correctly fetch and decode the format
- * @format : format id, used by drm-driver only to map drm forcc
- * @flag
- * @chroma_sample
+ * struct sde_format - defines the format configuration which
+ * allows SDE HW to correctly fetch and decode the format
+ * @base             : Base msm_format structure containing fourcc code
  * @fetch_planes
+ * @element
+ * @bits
+ * @chroma_sample
  * @unpack_align_msb
  * @unpack_tight
  * @unpack_count
  * @bpp
  * @alpha_enable
  * @fetch_mode
- * @bits
- * @element
+ * @is_yuv
+ * @flag
  */
-struct sde_mdp_format_params {
-	u32 format;
-	enum sde_mdp_plane_type fetch_planes;
+struct sde_format {
+	struct msm_format base;
+	enum sde_plane_type fetch_planes;
 	u8 element[SDE_MAX_PLANES];
 	u8 bits[SDE_MAX_PLANES];
-	enum sde_mdp_chroma_samp_type chroma_sample;
+	enum sde_chroma_samp_type chroma_sample;
 	u8 unpack_align_msb;	/* 0 to LSB, 1 to MSB */
 	u8 unpack_tight;	/* 0 for loose, 1 for tight */
 	u8 unpack_count;	/* 0 = 1 component, 1 = 2 component ... */
 	u8 bpp;                 /* Bytes per pixel */
 	u8 alpha_enable;	/*  source has alpha */
-	enum sde_mdp_fetch_type fetch_mode;
+	enum sde_fetch_type fetch_mode;
 	u8 is_yuv;
 	u32 flag;
 };
+#define to_sde_format(x) container_of(x, struct sde_format, base)
 
 /**
  * struct sde_hw_source_info - format information of the source pixel data
@@ -317,7 +320,7 @@ struct sde_mdp_format_params {
  * compressed formats @plane: per plane information
  */
 struct sde_hw_source_info {
-	struct sde_mdp_format_params *format;
+	const struct sde_format *format;
 	u32 width;
 	u32 height;
 	u32 num_planes;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_sspp.c b/drivers/gpu/drm/msm/sde/sde_hw_sspp.c
index af9aded5e9f4..94539ce70427 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_sspp.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_sspp.c
@@ -15,7 +15,7 @@
 #include "sde_hw_lm.h"
 #include "sde_hw_sspp.h"
 
-#define SDE_MDP_FETCH_CONFIG_RESET_VALUE   0x00000087
+#define SDE_FETCH_CONFIG_RESET_VALUE   0x00000087
 
 /* SDE_SSPP_SRC */
 #define SSPP_SRC_SIZE                      0x00
@@ -155,7 +155,7 @@ static void _sspp_setup_opmode(struct sde_hw_pipe *ctx,
  * Setup source pixel format, flip,
  */
 static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx,
-		struct sde_mdp_format_params *fmt, u32 flags)
+		const struct sde_format *fmt, u32 flags)
 {
 	struct sde_hw_blk_reg_map *c;
 	u32 chroma_samp, unpack, src_format;
@@ -181,10 +181,10 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx,
 
 	chroma_samp = fmt->chroma_sample;
 	if (flags & SDE_SSPP_SOURCE_ROTATED_90) {
-		if (chroma_samp == SDE_MDP_CHROMA_H2V1)
-			chroma_samp = SDE_MDP_CHROMA_H1V2;
-		else if (chroma_samp == SDE_MDP_CHROMA_H1V2)
-			chroma_samp = SDE_MDP_CHROMA_H2V1;
+		if (chroma_samp == SDE_CHROMA_H2V1)
+			chroma_samp = SDE_CHROMA_H1V2;
+		else if (chroma_samp == SDE_CHROMA_H1V2)
+			chroma_samp = SDE_CHROMA_H2V1;
 	}
 
 	src_format = (chroma_samp << 23) | (fmt->fetch_planes << 19) |
@@ -195,7 +195,7 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx,
 		src_format |= BIT(11); /* ROT90 */
 
 	if (fmt->alpha_enable &&
-			fmt->fetch_planes != SDE_MDP_PLANE_INTERLEAVED)
+			fmt->fetch_planes != SDE_PLANE_INTERLEAVED)
 		src_format |= BIT(8); /* SRCC3_EN */
 
 	if (flags & SDE_SSPP_SOLID_FILL)
@@ -208,12 +208,12 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx,
 		(fmt->unpack_align_msb << 18) |
 		((fmt->bpp - 1) << 9);
 
-	if (fmt->fetch_mode != SDE_MDP_FETCH_LINEAR) {
+	if (fmt->fetch_mode != SDE_FETCH_LINEAR) {
 		if (SDE_FORMAT_IS_UBWC(fmt))
 			opmode |= MDSS_MDP_OP_BWC_EN;
 		src_format |= (fmt->fetch_mode & 3) << 30; /*FRAME_FORMAT */
 		SDE_REG_WRITE(c, SSPP_FETCH_CONFIG,
-			SDE_MDP_FETCH_CONFIG_RESET_VALUE |
+			SDE_FETCH_CONFIG_RESET_VALUE |
 			ctx->highest_bank_bit << 18);
 	}
 
@@ -308,21 +308,21 @@ static void _sde_hw_sspp_setup_scaler(struct sde_hw_pipe *ctx,
 	c = &ctx->hw;
 
 	/* enable scaler(s) if valid filter set */
-	if (pe->horz_filter[SDE_SSPP_COMP_0] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->horz_filter[SDE_SSPP_COMP_0] < SDE_SCALE_FILTER_MAX)
 		config_h |= pe->horz_filter[SDE_SSPP_COMP_0] << 8;
-	if (pe->horz_filter[SDE_SSPP_COMP_1_2] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->horz_filter[SDE_SSPP_COMP_1_2] < SDE_SCALE_FILTER_MAX)
 		config_h |= pe->horz_filter[SDE_SSPP_COMP_1_2] << 12;
-	if (pe->horz_filter[SDE_SSPP_COMP_3] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->horz_filter[SDE_SSPP_COMP_3] < SDE_SCALE_FILTER_MAX)
 		config_h |= pe->horz_filter[SDE_SSPP_COMP_3] << 16;
 
 	if (config_h)
 		config_h |= BIT(0);
 
-	if (pe->vert_filter[SDE_SSPP_COMP_0] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->vert_filter[SDE_SSPP_COMP_0] < SDE_SCALE_FILTER_MAX)
 		config_v |= pe->vert_filter[SDE_SSPP_COMP_0] << 10;
-	if (pe->vert_filter[SDE_SSPP_COMP_1_2] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->vert_filter[SDE_SSPP_COMP_1_2] < SDE_SCALE_FILTER_MAX)
 		config_v |= pe->vert_filter[SDE_SSPP_COMP_1_2] << 14;
-	if (pe->vert_filter[SDE_SSPP_COMP_3] < SDE_MDP_SCALE_FILTER_MAX)
+	if (pe->vert_filter[SDE_SSPP_COMP_3] < SDE_SCALE_FILTER_MAX)
 		config_v |= pe->vert_filter[SDE_SSPP_COMP_3] << 18;
 
 	if (config_v)
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_sspp.h b/drivers/gpu/drm/msm/sde/sde_hw_sspp.h
index 1bfbc2109686..ab7ed86a2379 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_sspp.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_sspp.h
@@ -50,17 +50,17 @@ enum {
 };
 
 enum {
-	SDE_MDP_FRAME_LINEAR,
-	SDE_MDP_FRAME_TILE_A4X,
-	SDE_MDP_FRAME_TILE_A5X,
+	SDE_FRAME_LINEAR,
+	SDE_FRAME_TILE_A4X,
+	SDE_FRAME_TILE_A5X,
 };
 
 enum sde_hw_filter {
-	SDE_MDP_SCALE_FILTER_NEAREST = 0,
-	SDE_MDP_SCALE_FILTER_BIL,
-	SDE_MDP_SCALE_FILTER_PCMN,
-	SDE_MDP_SCALE_FILTER_CA,
-	SDE_MDP_SCALE_FILTER_MAX
+	SDE_SCALE_FILTER_NEAREST = 0,
+	SDE_SCALE_FILTER_BIL,
+	SDE_SCALE_FILTER_PCMN,
+	SDE_SCALE_FILTER_CA,
+	SDE_SCALE_FILTER_MAX
 };
 
 struct sde_hw_sharp_cfg {
@@ -169,7 +169,7 @@ struct sde_hw_sspp_ops {
 	 * @flags: Extra flags for format config
 	 */
 	void (*setup_format)(struct sde_hw_pipe *ctx,
-			struct sde_mdp_format_params *fmt, u32 flags);
+			const struct sde_format *fmt, u32 flags);
 
 	/**
 	 * setup_rects - setup pipe ROI rectangles
diff --git a/drivers/gpu/drm/msm/sde/sde_plane.c b/drivers/gpu/drm/msm/sde/sde_plane.c
index fc5f19d5c19f..dccc7eba4312 100644
--- a/drivers/gpu/drm/msm/sde/sde_plane.c
+++ b/drivers/gpu/drm/msm/sde/sde_plane.c
@@ -166,7 +166,7 @@ static void _sde_plane_set_scanout(struct drm_plane *plane,
 static void _sde_plane_setup_scaler3(struct sde_plane *psde,
 		uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h,
 		struct sde_hw_scaler3_cfg *scale_cfg,
-		struct sde_mdp_format_params *fmt,
+		const struct sde_format *fmt,
 		uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
 {
 }
@@ -185,7 +185,7 @@ static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  */
 static int _sde_plane_setup_scaler2(struct sde_plane *psde,
 		uint32_t src, uint32_t dst, uint32_t *phase_steps,
-		enum sde_hw_filter *filter, struct sde_mdp_format_params *fmt,
+		enum sde_hw_filter *filter, const struct sde_format *fmt,
 		uint32_t chroma_subsampling)
 {
 	if (!psde || !phase_steps || !filter || !fmt) {
@@ -204,23 +204,23 @@ static int _sde_plane_setup_scaler2(struct sde_plane *psde,
 	/* calculate scaler config, if necessary */
 	if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
 		filter[SDE_SSPP_COMP_3] =
-			(src <= dst) ? SDE_MDP_SCALE_FILTER_BIL :
-			SDE_MDP_SCALE_FILTER_PCMN;
+			(src <= dst) ? SDE_SCALE_FILTER_BIL :
+			SDE_SCALE_FILTER_PCMN;
 
 		if (SDE_FORMAT_IS_YUV(fmt)) {
-			filter[SDE_SSPP_COMP_0] = SDE_MDP_SCALE_FILTER_CA;
+			filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
 			filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
 		} else {
 			filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
 			filter[SDE_SSPP_COMP_1_2] =
-				SDE_MDP_SCALE_FILTER_NEAREST;
+				SDE_SCALE_FILTER_NEAREST;
 		}
 	} else {
 		/* disable scaler */
 		DBG("Disable scaler");
-		filter[SDE_SSPP_COMP_0] = SDE_MDP_SCALE_FILTER_MAX;
-		filter[SDE_SSPP_COMP_1_2] = SDE_MDP_SCALE_FILTER_MAX;
-		filter[SDE_SSPP_COMP_3] = SDE_MDP_SCALE_FILTER_MAX;
+		filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
+		filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
+		filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
 	}
 	return 0;
 }
@@ -244,7 +244,7 @@ static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
 		uint32_t src, uint32_t dst, uint32_t decimated_src,
 		uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
 		int *out_edge2, enum sde_hw_filter *filter,
-		struct sde_mdp_format_params *fmt, uint32_t chroma_subsampling,
+		const struct sde_format *fmt, uint32_t chroma_subsampling,
 		bool post_compare)
 {
 	int64_t edge1, edge2, caf;
@@ -254,8 +254,7 @@ static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
 	if (psde && phase_steps && out_src && out_edge1 &&
 			out_edge2 && filter && fmt) {
 		/* handle CAF for YUV formats */
-		if (SDE_FORMAT_IS_YUV(fmt) &&
-				*filter == SDE_MDP_SCALE_FILTER_CA)
+		if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
 			caf = PHASE_STEP_UNIT_SCALE;
 		else
 			caf = 0;
@@ -385,7 +384,7 @@ static int _sde_plane_verify_blob(void *blob_ptr,
 
 static void _sde_plane_setup_csc(struct sde_plane *psde,
 		struct sde_plane_state *pstate,
-		struct sde_mdp_format_params *fmt)
+		const struct sde_format *fmt)
 {
 	static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
 		{
@@ -479,7 +478,7 @@ static void _sde_plane_setup_csc(struct sde_plane *psde,
 }
 
 static void _sde_plane_setup_scaler(struct sde_plane *psde,
-		struct sde_mdp_format_params *fmt,
+		const struct sde_format *fmt,
 		struct sde_plane_state *pstate)
 {
 	struct sde_hw_pixel_ext *pe = NULL;
@@ -524,9 +523,9 @@ static void _sde_plane_setup_scaler(struct sde_plane *psde,
 
 	/* don't chroma subsample if decimating */
 	chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 :
-		drm_format_horz_chroma_subsampling(fmt->format);
+		drm_format_horz_chroma_subsampling(fmt->base.pixel_format);
 	chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 :
-		drm_format_vert_chroma_subsampling(fmt->format);
+		drm_format_vert_chroma_subsampling(fmt->base.pixel_format);
 
 	/* update scaler */
 	if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
@@ -649,7 +648,7 @@ int sde_plane_color_fill(struct drm_plane *plane,
 		uint32_t color, uint32_t alpha)
 {
 	struct sde_plane *psde;
-	struct sde_mdp_format_params *fmt;
+	const struct sde_format *fmt;
 
 	if (!plane) {
 		DRM_ERROR("Invalid plane\n");
@@ -666,7 +665,7 @@ int sde_plane_color_fill(struct drm_plane *plane,
 	 * select fill format to match user property expectation,
 	 * h/w only supports RGB variants
 	 */
-	fmt = sde_mdp_get_format_params(DRM_FORMAT_ABGR8888, 0);
+	fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
 
 	/* update sspp */
 	if (fmt && psde->pipe_hw->ops.setup_solidfill) {
@@ -702,10 +701,9 @@ static int _sde_plane_mode_set(struct drm_plane *plane,
 {
 	struct sde_plane *psde;
 	struct sde_plane_state *pstate;
-	const struct mdp_format *format;
-	uint32_t nplanes, tmp;
+	uint32_t nplanes, color_fill;
 	uint32_t src_flags;
-	struct sde_mdp_format_params *fmt;
+	const struct sde_format *fmt;
 
 	DBG("");
 
@@ -722,8 +720,7 @@ static int _sde_plane_mode_set(struct drm_plane *plane,
 	pstate = to_sde_plane_state(plane->state);
 	nplanes = drm_format_num_planes(fb->pixel_format);
 
-	format = to_mdp_format(msm_framebuffer_format(fb));
-	tmp = format->base.pixel_format;
+	fmt = to_sde_format(msm_framebuffer_format(fb));
 
 	/* src values are in Q16 fixed point, convert to integer */
 	src_x = src_x >> 16;
@@ -739,8 +736,7 @@ static int _sde_plane_mode_set(struct drm_plane *plane,
 	memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
 	src_flags = 0;
 
-	psde->pipe_cfg.src.format = sde_mdp_get_format_params(tmp,
-			fb->modifier[0]);
+	psde->pipe_cfg.src.format = fmt;
 	psde->pipe_cfg.src.width = fb->width;
 	psde->pipe_cfg.src.height = fb->height;
 	psde->pipe_cfg.src.num_planes = nplanes;
@@ -776,10 +772,11 @@ static int _sde_plane_mode_set(struct drm_plane *plane,
 	fmt = psde->pipe_cfg.src.format;
 
 	/* check for color fill */
-	tmp = (uint32_t)sde_plane_get_property(pstate, PLANE_PROP_COLOR_FILL);
-	if (tmp & BIT(31)) {
+	color_fill = (uint32_t)sde_plane_get_property(pstate,
+			PLANE_PROP_COLOR_FILL);
+	if (color_fill & BIT(31)) {
 		/* force 100% alpha, stop other processing */
-		return sde_plane_color_fill(plane, tmp, 0xFF);
+		return sde_plane_color_fill(plane, color_fill, 0xFF);
 	}
 
 	_sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
@@ -849,8 +846,7 @@ static int sde_plane_atomic_check(struct drm_plane *plane,
 	struct sde_plane *psde;
 	struct sde_plane_state *pstate;
 	struct drm_plane_state *old_state;
-	const struct mdp_format *format;
-	struct sde_mdp_format_params *fmt;
+	const struct sde_format *fmt;
 	size_t sc_u_size = 0;
 	struct sde_drm_scaler *sc_u = NULL;
 	int ret = 0;
@@ -925,9 +921,7 @@ static int sde_plane_atomic_check(struct drm_plane *plane,
 
 	if (sde_plane_enabled(state)) {
 		/* determine SDE format definition. State's fb is valid here. */
-		format = to_mdp_format(msm_framebuffer_format(state->fb));
-		fmt = sde_mdp_get_format_params(format->base.pixel_format,
-				0 /* modifier */);
+		fmt = to_sde_format(msm_framebuffer_format(state->fb));
 
 		/* don't check for other errors after first failure */
 		if (SDE_FORMAT_IS_YUV(fmt) &&
@@ -995,7 +989,7 @@ static int sde_plane_atomic_check(struct drm_plane *plane,
 				(deci_h > psde->pipe_sblk->maxvdeciexp)) {
 				DRM_ERROR("Too much decimation requested\n");
 				ret = -EINVAL;
-			} else if (fmt->fetch_mode != SDE_MDP_FETCH_LINEAR) {
+			} else if (fmt->fetch_mode != SDE_FETCH_LINEAR) {
 				DRM_ERROR("Decimation requires linear fetch\n");
 				ret = -EINVAL;
 			}
@@ -1708,7 +1702,7 @@ struct drm_plane *sde_plane_init(struct drm_device *dev,
 	psde->pipe_sblk = psde->pipe_hw->cap->sblk;
 
 	/* add plane to DRM framework */
-	psde->nformats = mdp_get_formats(psde->formats,
+	psde->nformats = sde_populate_formats(psde->formats,
 		ARRAY_SIZE(psde->formats),
 		!(psde->features & BIT(SDE_SSPP_CSC)) ||
 		!(psde->features & SDE_SSPP_SCALER));