diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2018-07-10 08:50:36 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2018-07-10 08:50:35 -0700 |
| commit | 6f512dfbfcfb22f0998c722de55446a0ed3a37b1 (patch) | |
| tree | aa9bc89cc88a72e95aa9a4e0d01ca26e647f0594 /drivers/gpu | |
| parent | 25da117ecaa5b646b8729463bdf1328e9dc9fc11 (diff) | |
| parent | 12e735d655fc49eb265dcc9aec804a69933f692b (diff) | |
Merge "DRM: DSI: setup software context during DSI prepare with splash"
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/msm/dba_bridge.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 60 |
2 files changed, 58 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/dba_bridge.c b/drivers/gpu/drm/msm/dba_bridge.c index 62294ddf8034..b4a04931e52e 100644 --- a/drivers/gpu/drm/msm/dba_bridge.c +++ b/drivers/gpu/drm/msm/dba_bridge.c @@ -232,6 +232,9 @@ static void _dba_bridge_post_disable(struct drm_bridge *bridge) return; } + if (d_bridge->cont_splash_enabled) + d_bridge->cont_splash_enabled = false; + if (d_bridge->ops.power_on) { rc = d_bridge->ops.power_on(d_bridge->dba_ctx, false, 0); if (rc) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 7c9c3c7b4cca..4bf694e2e7fa 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -176,6 +176,18 @@ static int dsi_display_ctrl_power_on(struct dsi_display *display) if (display->cont_splash_enabled) { pr_debug("skip ctrl power on\n"); + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + if (!ctrl->ctrl->current_state.pwr_enabled) { + ctrl->ctrl->pwr_info.host_pwr.refcount++; + ctrl->ctrl->pwr_info.digital.refcount++; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_VREG_ON; + ctrl->ctrl->current_state.pwr_enabled = true; + } + } return rc; } @@ -239,6 +251,16 @@ static int dsi_display_phy_power_on(struct dsi_display *display) /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip phy power on\n"); + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + if (!ctrl->phy->power_state) { + ctrl->phy->pwr_info.digital.refcount++; + ctrl->phy->pwr_info.phy_pwr.refcount++; + ctrl->phy->power_state = true; + } + } return rc; } @@ -298,9 +320,25 @@ static int dsi_display_ctrl_core_clk_on(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; + m_ctrl = &display->ctrl[display->clk_master_idx]; + /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip core clk on calling\n"); + m_ctrl->ctrl->current_state.pwr_enabled = true; + m_ctrl->ctrl->current_state.core_clk_enabled = true; + m_ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_CORE_CLK_ON; + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl || (ctrl == m_ctrl)) + continue; + ctrl->ctrl->current_state.pwr_enabled = true; + ctrl->ctrl->current_state.core_clk_enabled = true; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_CORE_CLK_ON; + } + return rc; } @@ -309,9 +347,6 @@ static int dsi_display_ctrl_core_clk_on(struct dsi_display *display) * be enabled before the other controller. Master controller in the * clock context refers to the controller that sources the clock. */ - - m_ctrl = &display->ctrl[display->clk_master_idx]; - rc = dsi_ctrl_set_power_state(m_ctrl->ctrl, DSI_CTRL_POWER_CORE_CLK_ON); if (rc) { pr_err("[%s] failed to turn on clocks, rc=%d\n", @@ -346,9 +381,26 @@ static int dsi_display_ctrl_link_clk_on(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; + m_ctrl = &display->ctrl[display->clk_master_idx]; + /* early return for splash enabled case */ if (display->cont_splash_enabled) { pr_debug("skip ctrl link clk on calling\n"); + m_ctrl->ctrl->current_state.pwr_enabled = true; + m_ctrl->ctrl->current_state.core_clk_enabled = true; + m_ctrl->ctrl->current_state.link_clk_enabled = true; + m_ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_LINK_CLK_ON; + for (i = 0; i < display->ctrl_count; i++) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl || (ctrl == m_ctrl)) + continue; + ctrl->ctrl->current_state.pwr_enabled = true; + ctrl->ctrl->current_state.core_clk_enabled = true; + ctrl->ctrl->current_state.link_clk_enabled = true; + ctrl->ctrl->current_state.power_state = + DSI_CTRL_POWER_LINK_CLK_ON; + } return rc; } @@ -358,8 +410,6 @@ static int dsi_display_ctrl_link_clk_on(struct dsi_display *display) * clock context refers to the controller that sources the clock. */ - m_ctrl = &display->ctrl[display->clk_master_idx]; - rc = dsi_ctrl_set_clock_source(m_ctrl->ctrl, &display->clock_info.src_clks); if (rc) { |
