diff options
| author | Rajesh Kemisetti <rajeshk@codeaurora.org> | 2017-03-01 15:45:31 +0530 |
|---|---|---|
| committer | Rajesh Kemisetti <rajeshk@codeaurora.org> | 2017-03-01 17:25:17 +0530 |
| commit | 236fb5f0cbd798e3d2468228d70fa4e5051e5a55 (patch) | |
| tree | c0991099317d186e5ee90ee6f7d0aa7351af42da /drivers/gpu | |
| parent | eee829e625416a38a8066524a0f6cac3b0c9d55b (diff) | |
msm: kgsl: Change GPU RAC hardware clockgating on SDM660
Disable GPU LRZ clock gating for A512 to avoid HW quirk.
Change-Id: I168d678ab2e08c6e2f16a63d6bc71e7f383f8f1b
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/msm/adreno_a5xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/msm/adreno_a5xx.c b/drivers/gpu/msm/adreno_a5xx.c index b58391adf3ab..87300096fbf1 100644 --- a/drivers/gpu/msm/adreno_a5xx.c +++ b/drivers/gpu/msm/adreno_a5xx.c @@ -1167,7 +1167,7 @@ static const struct kgsl_hwcg_reg a512_hwcg_regs[] = { {A5XX_RBBM_CLOCK_CNTL_CCU0, 0x00022220}, {A5XX_RBBM_CLOCK_CNTL_CCU1, 0x00022220}, {A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222}, - {A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00555555}, + {A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00505555}, {A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404}, {A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404}, {A5XX_RBBM_CLOCK_HYST_RAC, 0x07444044}, |