msm: kgsl: Add memory and periphery clock control for A540

Call clk_set_flag() to turn off both memory core and periphery for
bimc_gfx_clk clock and memory for gfx_3d.

CRs-Fixed: 1046649
Change-Id: I941f91eeba01f4e7aa5427056bc57875e7edf197
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>

5 files changed, 34 insertions, 0 deletions

diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 362493118670..498386903936 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -2728,6 +2728,14 @@ static void adreno_pwrlevel_change_settings(struct kgsl_device *device,
 					postlevel, post);
 }
 
+static void adreno_clk_set_options(struct kgsl_device *device, const char *name,
+	struct clk *clk)
+{
+	if (ADRENO_GPU_DEVICE(ADRENO_DEVICE(device))->clk_set_options)
+		ADRENO_GPU_DEVICE(ADRENO_DEVICE(device))->clk_set_options(
+			ADRENO_DEVICE(device), name, clk);
+}
+
 static void adreno_iommu_sync(struct kgsl_device *device, bool sync)
 {
 	struct scm_desc desc = {0};
@@ -2827,6 +2835,7 @@ static const struct kgsl_functable adreno_functable = {
 	.regulator_disable = adreno_regulator_disable,
 	.pwrlevel_change_settings = adreno_pwrlevel_change_settings,
 	.regulator_disable_poll = adreno_regulator_disable_poll,
+	.clk_set_options = adreno_clk_set_options
 };
 
 static struct platform_driver adreno_platform_driver = {
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index cbbfc57e27f4..286f7d63c8fe 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -766,6 +766,8 @@ struct adreno_gpudev {
 	void (*preemption_schedule)(struct adreno_device *);
 	void (*enable_64bit)(struct adreno_device *);
 	void (*pre_reset)(struct adreno_device *);
+	void (*clk_set_options)(struct adreno_device *,
+				const char *, struct clk *);
 };
 
 /**
diff --git a/drivers/gpu/msm/adreno_a5xx.c b/drivers/gpu/msm/adreno_a5xx.c
index 583de85678fc..0af11af851c3 100644
--- a/drivers/gpu/msm/adreno_a5xx.c
+++ b/drivers/gpu/msm/adreno_a5xx.c
@@ -14,6 +14,7 @@
 #include <soc/qcom/subsystem_restart.h>
 #include <soc/qcom/scm.h>
 #include <linux/pm_opp.h>
+#include <linux/clk/msm-clk.h>
 
 #include "adreno.h"
 #include "a5xx_reg.h"
@@ -1627,6 +1628,21 @@ static void a5xx_pwrlevel_change_settings(struct adreno_device *adreno_dev,
 	}
 }
 
+static void a5xx_clk_set_options(struct adreno_device *adreno_dev,
+	const char *name, struct clk *clk)
+{
+	if (adreno_is_a540(adreno_dev)) {
+		if (!strcmp(name, "mem_iface_clk"))
+			clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH);
+			clk_set_flags(clk, CLKFLAG_NORETAIN_MEM);
+		if (!strcmp(name, "core_clk")) {
+			clk_set_flags(clk, CLKFLAG_NORETAIN_PERIPH);
+			clk_set_flags(clk, CLKFLAG_NORETAIN_MEM);
+		}
+	}
+}
+
+
 static void a5xx_enable_64bit(struct adreno_device *adreno_dev)
 {
 	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -3516,4 +3532,5 @@ struct adreno_gpudev adreno_a5xx_gpudev = {
 	.preemption_schedule = a5xx_preemption_schedule,
 	.enable_64bit = a5xx_enable_64bit,
 	.pre_reset =  a5xx_pre_reset,
+	.clk_set_options = a5xx_clk_set_options,
 };
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index f42d822b451b..fce97a0786b4 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -165,6 +165,8 @@ struct kgsl_functable {
 	void (*pwrlevel_change_settings)(struct kgsl_device *device,
 		unsigned int prelevel, unsigned int postlevel, bool post);
 	void (*regulator_disable_poll)(struct kgsl_device *device);
+	void (*clk_set_options)(struct kgsl_device *device,
+		const char *name, struct clk *clk);
 };
 
 struct kgsl_ioctl {
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index ea760d9198ee..1f2178848664 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1655,6 +1655,10 @@ static int _get_clocks(struct kgsl_device *device)
 
 			if (!strcmp(name, "isense_clk"))
 				pwr->isense_clk_indx = i;
+
+			if (device->ftbl->clk_set_options)
+				device->ftbl->clk_set_options(device, name,
+					pwr->grp_clks[i]);
 			break;
 		}
 	}