diff options
| author | Fenglin Wu <fenglinw@codeaurora.org> | 2016-11-03 13:26:11 +0800 |
|---|---|---|
| committer | Fenglin Wu <fenglinw@codeaurora.org> | 2016-11-04 13:26:18 +0800 |
| commit | cd6a5983ba2018b366f244bd1b91d9c233d62ab0 (patch) | |
| tree | a21662639358b23103a2c836a0235e2cf9246930 /drivers/gpio | |
| parent | 8992f7dd08968333dcbeb70c5a0862970a0094cf (diff) | |
gpio: qpnp-pin: Fix reading the GPIO mode for GPIO_LV_MV subtype
GPIO_LV_MV subtype has different MODE_SEL mask with other existing
subtypes. Correct the MODE_SEL mask in qpnp_pin_get() function to
make sure it could get the correct status for LV_MV subtype GPIOs.
CRs-Fixed: 1081831
Change-Id: Ibeb5d34412d4333f9c7f21d2fc7df1d3b1d4e72e
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Diffstat (limited to 'drivers/gpio')
| -rw-r--r-- | drivers/gpio/qpnp-pin.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpio/qpnp-pin.c b/drivers/gpio/qpnp-pin.c index 182c6074985e..483bb9338ac3 100644 --- a/drivers/gpio/qpnp-pin.c +++ b/drivers/gpio/qpnp-pin.c @@ -827,9 +827,17 @@ static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned offset) if (WARN_ON(!q_spec)) return -ENODEV; + if (is_gpio_lv_mv(q_spec)) { + mask = Q_REG_LV_MV_MODE_SEL_MASK; + shift = Q_REG_LV_MV_MODE_SEL_SHIFT; + } else { + mask = Q_REG_MODE_SEL_MASK; + shift = Q_REG_MODE_SEL_SHIFT; + } + /* gpio val is from RT status iff input is enabled */ - if ((q_spec->regs[Q_REG_I_MODE_CTL] & Q_REG_MODE_SEL_MASK) - == QPNP_PIN_MODE_DIG_IN) { + if (q_reg_get(&q_spec->regs[Q_REG_I_MODE_CTL], shift, mask) + == QPNP_PIN_MODE_DIG_IN) { rc = regmap_read(q_chip->regmap, Q_REG_ADDR(q_spec, Q_REG_STATUS1), &val); buf[0] = (u8)val; |