diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2017-04-06 01:38:59 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-04-06 01:38:59 -0700 |
| commit | c03f770f110bf2bd4d1858d5a391909f0ebf5f1f (patch) | |
| tree | 8880abfdc3c16cb052bf5d3282d506373b7001be /drivers/clk | |
| parent | a09e2b50c8ca761f73d19c809c45af1319b31502 (diff) | |
| parent | 71b61f9188688748dbe9f4160bdf23d585cda26f (diff) | |
Merge "clk: msm: clock: Add support for early boot frequency for MSM8996" into dev/msm-4.4-8996au
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/msm/clock-cpu-8996.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/clk/msm/clock-cpu-8996.c b/drivers/clk/msm/clock-cpu-8996.c index bcda6f31d6f5..bca8ada97f7d 100644 --- a/drivers/clk/msm/clock-cpu-8996.c +++ b/drivers/clk/msm/clock-cpu-8996.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1308,6 +1308,7 @@ static int cpu_clock_8996_driver_probe(struct platform_device *pdev) unsigned long pwrclrate, perfclrate, cbfrate; int pvs_ver = 0; u32 pte_efuse; + u32 clk_rate; char perfclspeedbinstr[] = "qcom,perfcl-speedbinXX-vXX"; char pwrclspeedbinstr[] = "qcom,pwrcl-speedbinXX-vXX"; char cbfspeedbinstr[] = "qcom,cbf-speedbinXX-vXX"; @@ -1435,6 +1436,18 @@ static int cpu_clock_8996_driver_probe(struct platform_device *pdev) clk_prepare_enable(&pwrcl_alt_pll.c); clk_prepare_enable(&cbf_pll.c); + /* Override the existing ealry boot frequency for power cluster */ + ret = of_property_read_u32(pdev->dev.of_node, + "qcom,pwrcl-early-boot-freq", &clk_rate); + if (!ret) + pwrcl_early_boot_rate = clk_rate; + + /* Override the existing ealry boot frequency for perf cluster */ + ret = of_property_read_u32(pdev->dev.of_node, + "qcom,perfcl-early-boot-freq", &clk_rate); + if (!ret) + perfcl_early_boot_rate = clk_rate; + /* Set the early boot rate. This may also switch us to the ACD leg */ clk_set_rate(&pwrcl_clk.c, pwrcl_early_boot_rate); clk_set_rate(&perfcl_clk.c, perfcl_early_boot_rate); @@ -1450,6 +1463,7 @@ static struct of_device_id match_table[] = { { .compatible = "qcom,cpu-clock-8996" }, { .compatible = "qcom,cpu-clock-8996-v3" }, { .compatible = "qcom,cpu-clock-8996-pro" }, + { .compatible = "qcom,cpu-clock-8996-auto" }, {} }; @@ -1499,6 +1513,9 @@ module_exit(cpu_clock_8996_exit); #define HF_MUX_SEL_LF_MUX 0x1 #define LF_MUX_SEL_ALT_PLL 0x1 +#define PWRCL_EARLY_BOOT_RATE 1286400000 +#define PERFCL_EARLY_BOOT_RATE 1363200000 + static int use_alt_pll; module_param(use_alt_pll, int, 0444); @@ -1537,6 +1554,12 @@ int __init cpu_clock_8996_early_init(void) cpu_clocks_v3 = true; cpu_clocks_pro = true; } else if (of_find_compatible_node(NULL, NULL, + "qcom,cpu-clock-8996-auto")) { + cpu_clocks_v3 = true; + cpu_clocks_pro = true; + pwrcl_early_boot_rate = PWRCL_EARLY_BOOT_RATE; + perfcl_early_boot_rate = PERFCL_EARLY_BOOT_RATE; + } else if (of_find_compatible_node(NULL, NULL, "qcom,cpu-clock-8996-v3")) { cpu_clocks_v3 = true; } else if (!of_find_compatible_node(NULL, NULL, |