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authorSathish Ambley <sathishambley@codeaurora.org>2015-12-03 10:38:48 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 21:13:05 -0700
commitf321ad7eefb717cc87f6197f08f5f8c6ecd5d5af (patch)
treea0c29ec70042951cedd22b2126deb36a28c21ff1 /arch
parent48b6c5262931a266578ff5abc4593c210df3a5f1 (diff)
ARM: dts: msm: Update with correct SID for LPASS on msm8996
SID entries 13 to 15 are reserved and only entries from 5 to 12 are assigned for compute tasks. Trying to use SID entries from 13 to 15 when mapping the entries in SMMU could result in faults. Update the device tree entries to use the correct set of SIDs. Change-Id: I0033985f0a786fd4df19a1d83715781b2d5d0bd6 Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom/msm8996.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi
index 4ae257b5e4f2..a67ef5496038 100644
--- a/arch/arm/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8996.dtsi
@@ -3412,17 +3412,17 @@
qcom,msm_fastrpc_compute_cb6 {
compatible = "qcom,msm-fastrpc-compute-cb";
label = "adsprpc-smd";
- iommus = <&lpass_q6_smmu 13>;
+ iommus = <&lpass_q6_smmu 5>;
};
qcom,msm_fastrpc_compute_cb7 {
compatible = "qcom,msm-fastrpc-compute-cb";
label = "adsprpc-smd";
- iommus = <&lpass_q6_smmu 14>;
+ iommus = <&lpass_q6_smmu 6>;
};
qcom,msm_fastrpc_compute_cb8 {
compatible = "qcom,msm-fastrpc-compute-cb";
label = "adsprpc-smd";
- iommus = <&lpass_q6_smmu 15>;
+ iommus = <&lpass_q6_smmu 7>;
};
};