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| author | Shashank Mittal <mittals@codeaurora.org> | 2016-07-14 19:19:22 -0700 |
|---|---|---|
| committer | Shashank Mittal <mittals@codeaurora.org> | 2016-07-14 20:39:35 -0700 |
| commit | f069d3d13a72c223b9ea1086f0855f78ea5ed514 (patch) | |
| tree | 47237d895e2cc6e718397c279c214b1c50629386 /arch | |
| parent | bbfc29c3ec769407687618ad5a869ed43b000775 (diff) | |
ARM: dts: msm: set default mem_type for ETR device on msmcobalt
Set default mem_type to scatter-gather for ETR device.
Change-Id: Iaa6e6e58b9cf566dd749d81d4693c2b61be2c365
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi index c0777a7e193a..5192169f643b 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-coresight.dtsi @@ -20,6 +20,7 @@ reg-names = "tmc-base", "bam-base"; arm,buffer-size = <0x400000>; + arm,sg-enable; coresight-ctis = <&cti0 &cti8>; |