ARM: dts: msm: fix DP PHY and PLL register base address for msmcobalt

Update the DP PLL node with the correct base address
for PHY and PLL registers.

CRs-Fixed: 1009740
Change-Id: I7194e72a191f2f52dd708c84d5a8ab55f03729fe
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi
index 2e8011554119..d52d6a70a8bf 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi
@@ -78,15 +78,15 @@
 		};
 	};
 
-	mdss_dp_pll: qcom,mdss_dp_pll@ca20000 {
+	mdss_dp_pll: qcom,mdss_dp_pll@c011000 {
 		compatible = "qcom,mdss_dp_pll_cobalt";
 		status = "ok";
 		label = "MDSS DP PLL";
 		cell-index = <0>;
 		#clock-cells = <1>;
 
-		reg = <0xca20c00 0x190>,
-		      <0xca20000 0x910>,
+		reg = <0xc011c00 0x190>,
+		      <0xc011000 0x910>,
 		      <0x0c8c2300 0x8>;
 		reg-names = "pll_base", "phy_base", "gdsc_base";