diff options
| author | Dhoat Harpal <hdhoat@codeaurora.org> | 2016-06-27 16:25:14 +0530 |
|---|---|---|
| committer | Dhoat Harpal <hdhoat@codeaurora.org> | 2016-07-21 18:52:30 +0530 |
| commit | c2e4cfd2db3885cee57680d07187a21045253040 (patch) | |
| tree | e9a0c5da4870f0c642f39ad751227c38f11fa048 /arch | |
| parent | d375ea2d637d038bdd45a00ac0e81b8dc03ff3fd (diff) | |
ARM: dts: msm: Add G-Link SSR entries for MSMFALCON
SSR entries contain the list of subsystems to notify when an SSR for a
given subsystem occurs. This information enables G-Link to handle
closing and re-opening channels in the case of SSR.
CRs-Fixed: 1043377
Change-Id: Ibd8ceb8149b3041ce1f58ac4c3642d7391b89385
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index 733779db77dd..2b97599dee9e 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -268,4 +268,40 @@ "smem_targ_info_reg"; qcom,mpu-enabled; }; + + glink_mpss: qcom,glink-ssr-modem { + compatible = "qcom,glink_ssr"; + label = "modem"; + qcom,edge = "mpss"; + qcom,notify-edges = <&glink_lpass>, <&glink_rpm>, + <&glink_cdsp>; + qcom,xprt = "smem"; + }; + + glink_lpass: qcom,glink-ssr-adsp { + compatible = "qcom,glink_ssr"; + label = "adsp"; + qcom,edge = "lpass"; + qcom,notify-edges = <&glink_mpss>, <&glink_rpm>, + <&glink_cdsp>; + qcom,xprt = "smem"; + }; + + glink_rpm: qcom,glink-ssr-rpm { + compatible = "qcom,glink_ssr"; + label = "rpm"; + qcom,edge = "rpm"; + qcom,notify-edges = <&glink_lpass>, <&glink_mpss>, + <&glink_cdsp>; + qcom,xprt = "smem"; + }; + + glink_cdsp: qcom,glink-ssr-cdsp { + compatible = "qcom,glink_ssr"; + label = "cdsp"; + qcom,edge = "cdsp"; + qcom,notify-edges = <&glink_lpass>, <&glink_mpss>, + <&glink_rpm>; + qcom,xprt = "smem"; + }; }; |