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authorAshay Jaiswal <ashayj@codeaurora.org>2016-12-22 23:09:46 +0530
committerAshay Jaiswal <ashayj@codeaurora.org>2016-12-23 14:34:02 +0530
commitbabcc512ba6b3091e64f509dddccc2c60a2de0ba (patch)
tree58e808f51ed92e4d273a10eb18ad809bd2c4b78f /arch
parente379f786aa82c6c94b95cbb06befba802731019a (diff)
ARM: dts: msm: add support of PM3FALCON based MSMFALCON platform
MSMFALCON platform can support either PM2FALCON or PM3FALCON PMICs, add support for the same. CRs-Fixed: 1104886 Change-Id: Ic44359e224e0f9070238748bd9b16eed35974ba6 Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom/Makefile22
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-cdp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-mtp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-cdp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-mtp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-rcm.dts25
-rw-r--r--arch/arm/boot/dts/qcom/apqfalcon-rcm.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-cdp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-cdp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-mtp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-cdp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-mtp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-rcm.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-internal-codec-rcm.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-mtp.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-cdp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-mtp.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-qrd.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rcm.dts25
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rumi.dts146
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-sim.dts111
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-qrd.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-rcm.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-rumi.dts4
-rw-r--r--arch/arm/boot/dts/qcom/msmfalcon-sim.dts4
25 files changed, 560 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
index 4293b1929794..ed676188102b 100644
--- a/arch/arm/boot/dts/qcom/Makefile
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -135,17 +135,29 @@ dtb-$(CONFIG_ARCH_MSM8998) += msm8998-sim.dtb \
dtb-$(CONFIG_ARCH_MSMHAMSTER) += msmhamster-rumi.dtb
dtb-$(CONFIG_ARCH_MSMFALCON) += msmfalcon-sim.dtb \
- msmfalcon-rumi.dtb \
- msmfalcon-cdp.dtb \
msmfalcon-internal-codec-cdp.dtb \
- msmfalcon-mtp.dtb \
msmfalcon-internal-codec-mtp.dtb \
- msmfalcon-rcm.dtb \
msmfalcon-internal-codec-rcm.dtb \
+ msmfalcon-cdp.dtb \
+ msmfalcon-mtp.dtb \
msmfalcon-qrd.dtb \
+ msmfalcon-rcm.dtb \
+ msmfalcon-rumi.dtb \
+ msmfalcon-pm3falcon-cdp.dtb \
+ msmfalcon-pm3falcon-mtp.dtb \
+ msmfalcon-pm3falcon-qrd.dtb \
+ msmfalcon-pm3falcon-rcm.dtb \
+ msmfalcon-pm3falcon-rumi.dtb \
+ msmfalcon-internal-codec-pm3falcon-cdp.dtb \
+ msmfalcon-internal-codec-pm3falcon-mtp.dtb \
+ msmfalcon-internal-codec-pm3falcon-rcm.dtb \
+ msmfalcon-pm3falcon-sim.dtb \
apqfalcon-cdp.dtb \
apqfalcon-mtp.dtb \
- apqfalcon-rcm.dtb
+ apqfalcon-rcm.dtb \
+ apqfalcon-pm3falcon-cdp.dtb \
+ apqfalcon-pm3falcon-mtp.dtb \
+ apqfalcon-pm3falcon-rcm.dtb
dtb-$(CONFIG_ARCH_MSMTRITON) += msmtriton-rumi.dtb
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-cdp.dts b/arch/arm/boot/dts/qcom/apqfalcon-cdp.dts
index 9ed26e5ff0aa..fc449860da0d 100644
--- a/arch/arm/boot/dts/qcom/apqfalcon-cdp.dts
+++ b/arch/arm/boot/dts/qcom/apqfalcon-cdp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. APQ FALCON CDP";
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM2FALCON CDP";
compatible = "qcom,apqfalcon-cdp", "qcom,apqfalcon", "qcom,cdp";
qcom,board-id = <1 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-mtp.dts b/arch/arm/boot/dts/qcom/apqfalcon-mtp.dts
index 74e4fc8154a9..c4f6e9fb30b9 100644
--- a/arch/arm/boot/dts/qcom/apqfalcon-mtp.dts
+++ b/arch/arm/boot/dts/qcom/apqfalcon-mtp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-mtp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. APQ FALCON MTP";
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM2FALCON MTP";
compatible = "qcom,apqfalcon-mtp", "qcom,apqfalcon", "qcom,mtp";
qcom,board-id = <8 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-cdp.dts b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-cdp.dts
new file mode 100644
index 000000000000..851533931a61
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-cdp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "apqfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM3FALCON CDP";
+ compatible = "qcom,apqfalcon-cdp", "qcom,apqfalcon", "qcom,cdp";
+ qcom,board-id = <1 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-mtp.dts b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-mtp.dts
new file mode 100644
index 000000000000..e7e8aeb9c2aa
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-mtp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "apqfalcon.dtsi"
+#include "msmfalcon-mtp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM3FALCON MTP";
+ compatible = "qcom,apqfalcon-mtp", "qcom,apqfalcon", "qcom,mtp";
+ qcom,board-id = <8 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-rcm.dts b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-rcm.dts
new file mode 100644
index 000000000000..68c4bd724ccd
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/apqfalcon-pm3falcon-rcm.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "apqfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM3FALCON RCM";
+ compatible = "qcom,apqfalcon-cdp", "qcom,apqfalcon", "qcom,cdp";
+ qcom,board-id = <21 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/apqfalcon-rcm.dts b/arch/arm/boot/dts/qcom/apqfalcon-rcm.dts
index 52ff518f4ce4..8f4b164c55ca 100644
--- a/arch/arm/boot/dts/qcom/apqfalcon-rcm.dts
+++ b/arch/arm/boot/dts/qcom/apqfalcon-rcm.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. APQ FALCON RCM";
+ model = "Qualcomm Technologies, Inc. APQ FALCON PMFALCON + PM2FALCON RCM";
compatible = "qcom,apqfalcon-cdp", "qcom,apqfalcon", "qcom,cdp";
qcom,board-id = <21 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-cdp.dts b/arch/arm/boot/dts/qcom/msmfalcon-cdp.dts
index 76fa0bbc0fe8..ddcea8653983 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-cdp.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-cdp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON CDP";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON CDP";
compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
qcom,board-id = <1 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-cdp.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-cdp.dts
index 108328bd91f0..101408b594db 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-cdp.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-cdp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON Int. Audio Codec CDP";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON Int. Audio Codec CDP";
compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
qcom,board-id = <1 1>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-mtp.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-mtp.dts
index 3697ee8f97a0..d642648004fc 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-mtp.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-mtp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-mtp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON Int. Audio Codec MTP";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON Int. Audio Codec MTP";
compatible = "qcom,msmfalcon-mtp", "qcom,msmfalcon", "qcom,mtp";
qcom,board-id = <8 1>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-cdp.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-cdp.dts
new file mode 100644
index 000000000000..fe91109a4a07
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-cdp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON Int. Audio Codec CDP";
+ compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
+ qcom,board-id = <1 1>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-mtp.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-mtp.dts
new file mode 100644
index 000000000000..0653e898ec7d
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-mtp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-mtp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON Int. Audio Codec MTP";
+ compatible = "qcom,msmfalcon-mtp", "qcom,msmfalcon", "qcom,mtp";
+ qcom,board-id = <8 1>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-rcm.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-rcm.dts
new file mode 100644
index 000000000000..cb2b2239588d
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-pm3falcon-rcm.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON Int. Audio Codec RCM";
+ compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
+ qcom,board-id = <21 1>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-rcm.dts b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-rcm.dts
index bbdc41b97574..6bc9a3c7738f 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-rcm.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-internal-codec-rcm.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON Int. Audio Codec RCM";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON Int. Audio Codec RCM";
compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
qcom,board-id = <21 1>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-mtp.dts b/arch/arm/boot/dts/qcom/msmfalcon-mtp.dts
index 1d4aaa2333cb..cefe0d7c275b 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-mtp.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-mtp.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-mtp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON MTP";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON MTP";
compatible = "qcom,msmfalcon-mtp", "qcom,msmfalcon", "qcom,mtp";
qcom,board-id = <8 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-cdp.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-cdp.dts
new file mode 100644
index 000000000000..3d3f8682941f
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-cdp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON CDP";
+ compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
+ qcom,board-id = <1 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-mtp.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-mtp.dts
new file mode 100644
index 000000000000..4e6bb7336f2b
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-mtp.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-mtp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON MTP";
+ compatible = "qcom,msmfalcon-mtp", "qcom,msmfalcon", "qcom,mtp";
+ qcom,board-id = <8 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-qrd.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-qrd.dts
new file mode 100644
index 000000000000..e2d45f0d151e
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-qrd.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-qrd.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON QRD";
+ compatible = "qcom,msmfalcon-qrd", "qcom,msmfalcon", "qcom,qrd";
+ qcom,board-id = <0x1000b 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rcm.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rcm.dts
new file mode 100644
index 000000000000..c48124120d61
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rcm.dts
@@ -0,0 +1,25 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-cdp.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON RCM";
+ compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
+ qcom,board-id = <21 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rumi.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rumi.dts
new file mode 100644
index 000000000000..b81a92a4aa7c
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-rumi.dts
@@ -0,0 +1,146 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-pinctrl.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON RUMI";
+ compatible = "qcom,msmfalcon-rumi", "qcom,msmfalcon", "qcom,rumi";
+ qcom,board-id = <15 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+
+ chosen {
+ bootargs = "lpm_levels.sleep_disabled=1";
+ };
+};
+
+&usb3 {
+ /delete-property/ USB3_GDSC-supply;
+ /delete-property/ extcon;
+ dwc3@a800000 {
+ maximum-speed = "high-speed";
+ };
+};
+
+&ssphy {
+ compatible = "usb-nop-xceiv";
+};
+
+&qusb_phy0 {
+ reg = <0x0a928000 0x8000>,
+ <0x0a8f8800 0x400>,
+ <0x0a920000 0x100>;
+ reg-names = "qusb_phy_base",
+ "qscratch_base",
+ "emu_phy_base";
+ qcom,emulation;
+ qcom,qusb-phy-init-seq = <0x19 0x1404
+ 0x20 0x1414
+ 0x79 0x1410
+ 0x00 0x1418
+ 0x99 0x1404
+ 0x04 0x1408
+ 0xd9 0x1404>;
+ qcom,emu-dcm-reset-seq = <0x100000 0x20
+ 0x0 0x20
+ 0x1a0 0x20
+ 0x5 0x14>;
+};
+
+&uartblsp1dm1 {
+ status = "ok";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart_console_active>;
+};
+
+&sdhc_1 {
+ /* device core power supply */
+ vdd-supply = <&pm2falcon_l4>;
+ qcom,vdd-voltage-level = <2950000 2950000>;
+ qcom,vdd-current-level = <200 570000>;
+
+ /* device communication power supply */
+ vdd-io-supply = <&pmfalcon_l8>;
+ qcom,vdd-io-always-on;
+ qcom,vdd-io-lpm-sup;
+ qcom,vdd-io-voltage-level = <1800000 1800000>;
+ qcom,vdd-io-current-level = <200 325000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
+ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
+
+ qcom,clk-rates = <400000 20000000 25000000 50000000 192000000
+ 384000000>;
+
+ qcom,nonremovable;
+ qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
+
+ status = "ok";
+};
+
+&clock_gcc {
+ compatible = "qcom,dummycc";
+ clock-output-names = "gcc_clocks";
+};
+
+&pmfalcon_charger {
+ status = "disabled";
+};
+
+&pmfalcon_fg {
+ status = "disabled";
+};
+
+&clock_gfx {
+ compatible = "qcom,dummycc";
+ clock-output-names = "gfx_clocks";
+};
+
+&pmfalcon_pdphy {
+ status = "disabled";
+};
+
+&clock_mmss {
+ compatible = "qcom,dummycc";
+ clock-output-names = "mmss_clocks";
+};
+
+&ufsphy1 {
+ vdda-phy-supply = <&pm2falcon_l1>;
+ vdda-pll-supply = <&pmfalcon_l10>;
+ vddp-ref-clk-supply = <&pmfalcon_l1>;
+ vdda-phy-max-microamp = <51400>;
+ vdda-pll-max-microamp = <14200>;
+ vddp-ref-clk-max-microamp = <100>;
+ vddp-ref-clk-always-on;
+};
+
+&ufs1 {
+ vdd-hba-supply = <&gdsc_ufs>;
+ vdd-hba-fixed-regulator;
+ vcc-supply = <&pm2falcon_l4>;
+ vccq2-supply = <&pmfalcon_l8>;
+ vcc-max-microamp = <500000>;
+ vccq2-max-microamp = <600000>;
+ qcom,disable-lpm;
+};
+
+&clock_debug {
+ compatible = "qcom,dummycc";
+ clock-output-names = "debug_clocks";
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-sim.dts b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-sim.dts
new file mode 100644
index 000000000000..b47c1d328201
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmfalcon-pm3falcon-sim.dts
@@ -0,0 +1,111 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "msmfalcon.dtsi"
+#include "msmfalcon-pinctrl.dtsi"
+#include "msm-pm3falcon.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM3FALCON SIM";
+ compatible = "qcom,msmfalcon-sim", "qcom,msmfalcon", "qcom,sim";
+ qcom,board-id = <16 0>;
+ qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>;
+
+ chosen {
+ bootargs = "lpm_levels.sleep_disabled=1";
+ };
+};
+
+&usb3 {
+ reg = <0xa800000 0xfc000>;
+ reg-names = "core_base";
+ /delete-property/ extcon;
+ dwc3@a800000 {
+ maximum-speed = "high-speed";
+ };
+};
+
+&ssphy {
+ compatible = "usb-nop-xceiv";
+};
+
+&qusb_phy0 {
+ compatible = "usb-nop-xceiv";
+};
+
+&uartblsp1dm1 {
+ status = "ok";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart_console_active>;
+};
+
+&sdhc_1 {
+ /* device core power supply */
+ vdd-supply = <&pm2falcon_l4>;
+ qcom,vdd-voltage-level = <2950000 2950000>;
+ qcom,vdd-current-level = <200 570000>;
+
+ /* device communication power supply */
+ vdd-io-supply = <&pmfalcon_l8>;
+ qcom,vdd-io-always-on;
+ qcom,vdd-io-lpm-sup;
+ qcom,vdd-io-voltage-level = <1800000 1800000>;
+ qcom,vdd-io-current-level = <200 325000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
+ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
+
+ qcom,clk-rates = <400000 20000000 25000000 50000000 192000000
+ 384000000>;
+
+ qcom,nonremovable;
+ qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
+
+ status = "ok";
+};
+
+&pmfalcon_charger {
+ status = "disabled";
+};
+
+&pmfalcon_fg {
+ status = "disabled";
+};
+
+&pmfalcon_pdphy {
+ status = "disabled";
+};
+
+&ufsphy1 {
+ vdda-phy-supply = <&pm2falcon_l1>;
+ vdda-pll-supply = <&pmfalcon_l10>;
+ vddp-ref-clk-supply = <&pmfalcon_l1>;
+ vdda-phy-max-microamp = <51400>;
+ vdda-pll-max-microamp = <14200>;
+ vddp-ref-clk-max-microamp = <100>;
+ vddp-ref-clk-always-on;
+ status = "ok";
+};
+
+&ufs1 {
+ vdd-hba-supply = <&gdsc_ufs>;
+ vdd-hba-fixed-regulator;
+ vcc-supply = <&pm2falcon_l4>;
+ vccq2-supply = <&pmfalcon_l8>;
+ vcc-max-microamp = <500000>;
+ vccq2-max-microamp = <600000>;
+ status = "ok";
+};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-qrd.dts b/arch/arm/boot/dts/qcom/msmfalcon-qrd.dts
index 229676f17456..b97fdd18e229 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-qrd.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-qrd.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-qrd.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON QRD";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON QRD";
compatible = "qcom,msmfalcon-qrd", "qcom,msmfalcon", "qcom,qrd";
qcom,board-id = <0x1000b 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-rcm.dts b/arch/arm/boot/dts/qcom/msmfalcon-rcm.dts
index 140be9311e8a..e4f59c735e70 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-rcm.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-rcm.dts
@@ -17,7 +17,9 @@
#include "msmfalcon-cdp.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON RCM";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON RCM";
compatible = "qcom,msmfalcon-cdp", "qcom,msmfalcon", "qcom,cdp";
qcom,board-id = <21 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
};
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts b/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
index eed69d178fa3..c371ddeda563 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-rumi.dts
@@ -17,9 +17,11 @@
#include "msmfalcon-pinctrl.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON RUMI";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON RUMI";
compatible = "qcom,msmfalcon-rumi", "qcom,msmfalcon", "qcom,rumi";
qcom,board-id = <15 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
chosen {
bootargs = "lpm_levels.sleep_disabled=1";
diff --git a/arch/arm/boot/dts/qcom/msmfalcon-sim.dts b/arch/arm/boot/dts/qcom/msmfalcon-sim.dts
index 80772bab86e4..596aae818fab 100644
--- a/arch/arm/boot/dts/qcom/msmfalcon-sim.dts
+++ b/arch/arm/boot/dts/qcom/msmfalcon-sim.dts
@@ -17,9 +17,11 @@
#include "msmfalcon-pinctrl.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. MSM FALCON SIM";
+ model = "Qualcomm Technologies, Inc. MSM FALCON PMFALCON + PM2FALCON SIM";
compatible = "qcom,msmfalcon-sim", "qcom,msmfalcon", "qcom,sim";
qcom,board-id = <16 0>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
chosen {
bootargs = "lpm_levels.sleep_disabled=1";