diff options
| author | Abinaya Selvaraj <abinayas@codeaurora.org> | 2016-12-12 19:32:08 +0530 |
|---|---|---|
| committer | Abinaya Selvaraj <abinayas@codeaurora.org> | 2016-12-15 09:55:13 +0530 |
| commit | 5dd85a95f8d28f1f04e36d1fd31fae6bed999072 (patch) | |
| tree | 6ab25e072c0f27cea1aacf787a91b4cee56a6e94 /arch | |
| parent | a80e267a8c0d61790c3d1d5f7181ebd1be39c438 (diff) | |
ARM: dts: msm: Add NFC device node for msm8998 QRD platforms
Add NFC device tree node for msm8998 QRD VR1 and SKUK
platforms. Add PMIC GPIO configurations associated with it.
Change-Id: I5b265ecd403bf09924ae6c58e56171f3a4d7e3d7
Acked-by: Umesh Jagga <ujagga@qti.qualcomm.com>
Signed-off-by: Abinaya Selvaraj <abinayas@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi | 31 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8998-qrd-vr1.dtsi | 31 |
2 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi b/arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi index f60fd10b92f8..67e73e474108 100644 --- a/arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-qrd-skuk.dtsi @@ -101,6 +101,28 @@ pinctrl-0 = <&uart_console_active>; }; +&i2c_6 { /* BLSP1 QUP6 (NFC) */ + status = "okay"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 92 0x00>; + qcom,nq-ven = <&tlmm 12 0x00>; + qcom,nq-firm = <&tlmm 93 0x00>; + qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; + qcom,nq-esepwr = <&tlmm 116 0x00>; + interrupt-parent = <&tlmm>; + qcom,clk-src = "BBCLK3"; + interrupts = <92 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; + clocks = <&clock_gcc clk_ln_bb_clk3_pin>; + clock-names = "ref_clk"; + }; +}; + &pm8998_gpios { /* GPIO 6 for Vol+ Key */ gpio@c500 { @@ -111,6 +133,15 @@ qcom,src-sel = <0>; qcom,out-strength = <1>; }; + + /* GPIO 21 (NFC_CLK_REQ) */ + gpio@d400 { + qcom,mode = <0>; + qcom,vin-sel = <1>; + qcom,src-sel = <0>; + qcom,master-en = <1>; + status = "okay"; + }; }; &soc { diff --git a/arch/arm/boot/dts/qcom/msm8998-qrd-vr1.dtsi b/arch/arm/boot/dts/qcom/msm8998-qrd-vr1.dtsi index bd9d8147dd82..70f18b5c6bc8 100644 --- a/arch/arm/boot/dts/qcom/msm8998-qrd-vr1.dtsi +++ b/arch/arm/boot/dts/qcom/msm8998-qrd-vr1.dtsi @@ -100,6 +100,28 @@ pinctrl-0 = <&uart_console_active>; }; +&i2c_6 { /* BLSP1 QUP6 (NFC) */ + status = "okay"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 92 0x00>; + qcom,nq-ven = <&tlmm 12 0x00>; + qcom,nq-firm = <&tlmm 93 0x00>; + qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; + qcom,nq-esepwr = <&tlmm 116 0x00>; + interrupt-parent = <&tlmm>; + qcom,clk-src = "BBCLK3"; + interrupts = <92 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; + clocks = <&clock_gcc clk_ln_bb_clk3_pin>; + clock-names = "ref_clk"; + }; +}; + &pm8998_gpios { /* GPIO 6 for Vol+ Key */ gpio@c500 { @@ -110,6 +132,15 @@ qcom,src-sel = <0>; qcom,out-strength = <1>; }; + + /* GPIO 21 (NFC_CLK_REQ) */ + gpio@d400 { + qcom,mode = <0>; + qcom,vin-sel = <1>; + qcom,src-sel = <0>; + qcom,master-en = <1>; + status = "okay"; + }; }; &soc { |