diff options
| author | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-09-10 14:23:02 -0700 |
|---|---|---|
| committer | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-09-10 14:55:06 -0700 |
| commit | 49541d564465304ee6fcfd2ad59ca967444f78ff (patch) | |
| tree | 3e260728435c9ad6f4e3784399f545eb36717c1c /arch | |
| parent | 8bd9feafb1aec00be5400f818c664b05dbf02fba (diff) | |
ARM: dts: msm: add ref_clk entries needed for DisplayPort
Add the reference clock entries for Display-Port PLL driver
and Display-Port controller driver nodes. These clocks are needed
before initializing the DP controller and PLL block.
Change-Id: I6df6a254b29d65b91ca4d7744f9163ef9cb6b9ff
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi | 8 |
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi index 11571415c02e..af0eb60818fb 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss-pll.dtsi @@ -96,8 +96,10 @@ gdsc-supply = <&gdsc_mdss>; - clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>; - clock-names = "iface_clk"; + clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>, + <&clock_gcc clk_ln_bb_clk1>, + <&clock_gcc clk_gcc_usb3_clkref_clk>; + clock-names = "iface_clk", "ref_clk_src", "ref_clk"; clock-rate = <0>; qcom,platform-supply-entries { diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi index fd930d3d1644..4c0c887657a1 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi @@ -480,15 +480,17 @@ <&clock_mmss clk_mmss_mdss_mdp_clk>, <&clock_mmss clk_mmss_mdss_hdmi_dp_ahb_clk>, <&clock_mmss clk_mmss_mdss_dp_aux_clk>, + <&clock_gcc clk_ln_bb_clk1>, + <&clock_gcc clk_gcc_usb3_clkref_clk>, <&clock_mmss clk_mmss_mdss_dp_link_clk>, <&clock_mmss clk_mmss_mdss_dp_link_intf_clk>, <&clock_mmss clk_mmss_mdss_dp_crypto_clk>, <&clock_mmss clk_mmss_mdss_dp_pixel_clk>; clock-names = "core_mnoc_clk", "core_iface_clk", "core_bus_clk", "core_mdp_core_clk", "core_alt_iface_clk", - "core_aux_clk", "ctrl_link_clk", - "ctrl_link_iface_clk", "ctrl_crypto_clk", - "ctrl_pixel_clk"; + "core_aux_clk", "core_ref_clk_src", "core_ref_clk", + "ctrl_link_clk", "ctrl_link_iface_clk", + "ctrl_crypto_clk", "ctrl_pixel_clk"; qcom,dp-usbpd-detection = <&pmicobalt_pdphy>; |