diff options
| author | Shashank Mittal <mittals@codeaurora.org> | 2015-12-02 14:29:12 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:12:59 -0700 |
| commit | 41778206e4295d10ff63d332c026570ee971d114 (patch) | |
| tree | 1fa254e39bd0f878794132c2c6253cd9d61a3c33 /arch | |
| parent | 4223684cd81440885a8c06ddad6e7dac98c60b48 (diff) | |
ARM: dts: msm: force register dump during tmc enable
Enable force-reg-dump to save tmc registers in memory dump at the
time of tmc enable, so that they can be extracted for debug purpose even
if they get reset on a crash.
CRs-Fixed: 945264
Change-Id: Ibd817bd79383d7df0aaee7b15694800732fdb74e
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8996-coresight-v2.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8996-coresight-v3.dtsi | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996-coresight-v2.dtsi b/arch/arm/boot/dts/qcom/msm8996-coresight-v2.dtsi index 16a77dd10250..379ce1b0ce6a 100644 --- a/arch/arm/boot/dts/qcom/msm8996-coresight-v2.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-coresight-v2.dtsi @@ -24,6 +24,7 @@ qcom,memory-size = <0x400000>; qcom,tmc-flush-powerdown; qcom,sg-enable; + qcom,force-reg-dump; coresight-id = <0>; coresight-name = "coresight-tmc-etr"; @@ -93,6 +94,7 @@ coresight-ctis = <&cti0 &cti8>; qcom,tmc-flush-powerdown; + qcom,force-reg-dump; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; diff --git a/arch/arm/boot/dts/qcom/msm8996-coresight-v3.dtsi b/arch/arm/boot/dts/qcom/msm8996-coresight-v3.dtsi index cd7a319252b0..f9c9d07c3078 100644 --- a/arch/arm/boot/dts/qcom/msm8996-coresight-v3.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-coresight-v3.dtsi @@ -22,6 +22,7 @@ qcom,memory-size = <0x400000>; qcom,tmc-flush-powerdown; qcom,sg-enable; + qcom,force-reg-dump; coresight-id = <0>; coresight-name = "coresight-tmc-etr"; @@ -91,6 +92,7 @@ coresight-ctis = <&cti0 &cti8>; qcom,tmc-flush-powerdown; + qcom,force-reg-dump; clocks = <&clock_gcc clk_qdss_clk>, <&clock_gcc clk_qdss_a_clk>; |