diff options
| author | David Collins <collinsd@codeaurora.org> | 2016-03-29 15:46:01 -0700 |
|---|---|---|
| committer | Bryan Huntsman <bryanh@codeaurora.org> | 2016-04-12 15:49:41 -0700 |
| commit | 3ee8625f4189f166d69f825dab3ed97fcc6f7b3f (patch) | |
| tree | 21a238a5bf1203c8ebfe6060ac36eda103e2bffb /arch | |
| parent | deb0522330975705a146ac6a09101fb8b9d309fa (diff) | |
ARM: dts: msm: use VDD_GFX CPR regulator for GPU clock on msmcobalt
Switch the GPU clock to use the gfx_vreg CPR regulator device for
vdd_gpucc-supply. This ensures that the VDD_GFX operating
voltage ends up as low as possible. Also switch the gdsc_gpu_gx
GDSC regulator to use the gfx_vreg regulator for parent-supply.
Add and use a stub regulator for the GFX clock vdd_gpucc-supply
on sim and rumi targets since gfx_vreg may not be usable on these
targets for certain hardware and bootloader combinations.
Change-Id: Ic6536cb90da928ea82d4575922bdf3cb153e5a27
CRs-Fixed: 986619
Signed-off-by: David Collins <collinsd@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi | 18 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi | 18 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 18 |
3 files changed, 45 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi index 26e229ae6a2c..7ced6a33f8f4 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi @@ -58,6 +58,24 @@ status = "ok"; }; +/ { + gfx_stub_vreg: regulator-gfx-stub { + compatible = "qcom,stub-regulator"; + regulator-name = "gfx_stub_corner"; + qcom,hpm-min-load = <100000>; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <6>; + }; +}; + +&clock_gfx { + vdd_gpucc-supply = <&gfx_stub_vreg>; +}; + +&gdsc_gpu_gx { + parent-supply = <&gfx_stub_vreg>; +}; + &clock_cpu { qcom,cc-factor = <10>; qcom,osm-clk-rate = <2000000>; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi index 64291b3b2abc..2d7027034efd 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi @@ -33,3 +33,21 @@ status = "ok"; }; + +/ { + gfx_stub_vreg: regulator-gfx-stub { + compatible = "qcom,stub-regulator"; + regulator-name = "gfx_stub_corner"; + qcom,hpm-min-load = <100000>; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <6>; + }; +}; + +&clock_gfx { + vdd_gpucc-supply = <&gfx_stub_vreg>; +}; + +&gdsc_gpu_gx { + parent-supply = <&gfx_stub_vreg>; +}; diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 8a86716ea3c3..63bcec04cf8e 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -613,18 +613,18 @@ compatible = "qcom,gfxcc-cobalt"; reg = <0x5065000 0x9000>; reg-names = "cc_base"; - vdd_gpucc-supply = <&pm8005_s1>; + vdd_gpucc-supply = <&gfx_vreg>; vdd_mx-supply = <&pmcobalt_s9_level>; vdd_gpu_mx-supply = <&pmcobalt_s9_level>; qcom,gfx3d_clk_src-opp-store-vcorner = <&msm_gpu>; qcom,gfxfreq-speedbin0 = - < 0 0 0 >, - < 171000000 520000 RPM_SMD_REGULATOR_LEVEL_SVS >, - < 251000000 570000 RPM_SMD_REGULATOR_LEVEL_SVS >, - < 332000000 630000 RPM_SMD_REGULATOR_LEVEL_SVS >, - < 403000000 680000 RPM_SMD_REGULATOR_LEVEL_SVS >, - < 504000000 745000 RPM_SMD_REGULATOR_LEVEL_NOM >, - < 650000000 855000 RPM_SMD_REGULATOR_LEVEL_TURBO >; + < 0 0 0 >, + < 171000000 1 RPM_SMD_REGULATOR_LEVEL_SVS >, + < 251000000 2 RPM_SMD_REGULATOR_LEVEL_SVS >, + < 332000000 3 RPM_SMD_REGULATOR_LEVEL_SVS >, + < 403000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >, + < 504000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >, + < 650000000 6 RPM_SMD_REGULATOR_LEVEL_TURBO >; qcom,gfxfreq-mx-speedbin0 = < 0 0 >, < 171000000 RPM_SMD_REGULATOR_LEVEL_SVS >, @@ -2146,7 +2146,7 @@ <&clock_gfx clk_gpucc_gfx3d_clk>, <&clock_gfx clk_gfx3d_clk_src>; qcom,force-enable-root-clk; - parent-supply = <&pm8005_s1>; + parent-supply = <&gfx_vreg>; status = "ok"; }; |