diff options
| author | Taniya Das <tdas@codeaurora.org> | 2018-04-24 14:42:07 +0530 |
|---|---|---|
| committer | Taniya Das <tdas@codeaurora.org> | 2018-05-30 15:03:27 +0530 |
| commit | 129e694595fb3779a994844797b3ff9992b161e6 (patch) | |
| tree | bfdca7624e7164c061313deef4251217682c089e /arch | |
| parent | 22f07893c9319dceb3d3a09634344aaa4c45dd83 (diff) | |
ARM: dts: msm: Add support for new speed bin for SDM660
New cpu speed bin of 4 is added to support 1.9/1.8GHz.
Change-Id: Ic0dffc7c46e82748bf9f40de7f478ec073142dd1
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom/sdm660.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index 593934328ac5..30d23cb160f5 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -1295,6 +1295,16 @@ < 1536000000 0x04040050 0x08400040 0x2 6 >, < 1612800000 0x04040054 0x09430043 0x2 7 >; + qcom,pwrcl-speedbin4-v0 = + < 300000000 0x0004000f 0x01200020 0x1 1 >, + < 633600000 0x05040021 0x03200020 0x1 2 >, + < 902400000 0x0404002f 0x04260026 0x1 3 >, + < 1113600000 0x0404003a 0x052e002e 0x2 4 >, + < 1401600000 0x04040049 0x073a003a 0x2 5 >, + < 1536000000 0x04040050 0x08400040 0x2 6 >, + < 1747200000 0x0404005b 0x09480048 0x2 7 >, + < 1843200000 0x04040060 0x094c004c 0x3 8 >; + qcom,perfcl-speedbin0-v0 = < 300000000 0x0004000f 0x01200020 0x1 1 >, < 1113600000 0x0404003a 0x052e002e 0x1 2 >, @@ -1320,6 +1330,13 @@ < 1747200000 0x0404005b 0x09480048 0x2 4 >, < 1804800000 0x0404005e 0x094b004b 0x2 5 >; + qcom,perfcl-speedbin4-v0 = + < 300000000 0x0004000f 0x01200020 0x1 1 >, + < 1113600000 0x0404003a 0x052e002e 0x1 2 >, + < 1401600000 0x04040049 0x073a003a 0x2 3 >, + < 1747200000 0x0404005b 0x09480048 0x2 4 >, + < 1958400000 0x04040066 0x0a510051 0x2 5 >; + qcom,up-timer = <1000 1000>; qcom,down-timer = <1000 1000>; qcom,set-ret-inactive; |