diff options
| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2015-11-19 17:38:21 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@google.com> | 2018-02-05 08:58:31 -0800 |
| commit | 0075089fffece3280029ec95d234079f3d9e72f3 (patch) | |
| tree | ebdefd3d9e0e4c331759b173c14b9de278aa1a9c /arch | |
| parent | f9b39ce8d4433676ce8ccc6e044a6818ebf5e649 (diff) | |
UPSTREAM: MIPS: remove aliasing alignment if HW has antialising support
MIPS hardware may have an antialising support and it works even
page size is small.
Setup a shared memory aliasing mask to page size if hardware has
an antialising support. Big shared memory mask forces a disruption
in page address assignment and that corrupts Android library memory
handling.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: cernekee@gmail.com
Cc: paul.gortmaker@windriver.com
Cc: kumba@gentoo.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11516/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit cb80b2a38bd609b2f5a650e9ab87ea50105ad5ea)
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 4d3859e11f12..5628f85bc5b0 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1733,7 +1733,7 @@ void r4k_cache_init(void) * This code supports virtually indexed processors and will be * unnecessarily inefficient on physically indexed processors. */ - if (c->dcache.linesz) + if (c->dcache.linesz && cpu_has_dc_aliases) shm_align_mask = max_t( unsigned long, c->dcache.sets * c->dcache.linesz - 1, PAGE_SIZE - 1); |