diff options
| author | Ingo Molnar <mingo@kernel.org> | 2012-04-14 13:18:27 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-04-14 13:19:04 +0200 |
| commit | 6ac1ef482d7ae0c690f1640bf6eb818ff9a2d91e (patch) | |
| tree | 021cc9f6b477146fcebe6f3be4752abfa2ba18a9 /arch/m68k/platform | |
| parent | 682968e0c425c60f0dde37977e5beb2b12ddc4cc (diff) | |
| parent | a385ec4f11bdcf81af094c03e2444ee9b7fad2e5 (diff) | |
Merge branch 'perf/core' into perf/uprobes
Merge in latest upstream (and the latest perf development tree),
to prepare for tooling changes, and also to pick up v3.4 MM
changes that the uprobes code needs to take care of.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/m68k/platform')
26 files changed, 514 insertions, 1884 deletions
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index 6fa3f800277a..6bfbeebd231b 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -16,83 +16,6 @@ #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> - -/***************************************************************************/ - -static struct mcf_platform_uart m5206_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, - }, - { }, -}; - -static struct platform_device m5206_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5206_uart_platform, -}; - -static struct platform_device *m5206_devices[] __initdata = { - &m5206_uart, -}; - -/***************************************************************************/ - -static void __init m5206_uart_init_line(int line, int irq) -{ - if (line == 0) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - -static void __init m5206_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5206_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5206_uart_init_line(line, m5206_uart_platform[line].irq); -} - -/***************************************************************************/ - -static void __init m5206_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - -void m5206_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} /***************************************************************************/ @@ -104,9 +27,7 @@ void __init config_BSP(char *commandp, int size) commandp[size-1] = 0; #endif /* CONFIG_NETtel */ - mach_reset = m5206_cpu_reset; - m5206_timers_init(); - m5206_uarts_init(); + mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); @@ -115,13 +36,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c index 8a98683f1b15..235947844f27 100644 --- a/arch/m68k/platform/520x/config.c +++ b/arch/m68k/platform/520x/config.c @@ -15,194 +15,14 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m520x_uart_platform[] = { - { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, - }, - { }, -}; - -static struct platform_device m520x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m520x_uart_platform, -}; - -static struct resource m520x_fec_resources[] = { - { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 64 + 36, - .end = 64 + 36, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 40, - .end = 64 + 40, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 42, - .end = 64 + 42, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m520x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m520x_fec_resources), - .resource = m520x_fec_resources, -}; - -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m520x_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#define MCFQSPI_CS0 46 -#define MCFQSPI_CS1 47 -#define MCFQSPI_CS2 27 - -static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - return 0; - -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m520x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - } -} - -static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m520x_cs_control = { - .setup = m520x_cs_setup, - .teardown = m520x_cs_teardown, - .select = m520x_cs_select, - .deselect = m520x_cs_deselect, -}; - -static struct mcfqspi_platform_data m520x_qspi_data = { - .bus_num = 0, - .num_chipselect = 3, - .cs_control = &m520x_cs_control, -}; - -static struct platform_device m520x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m520x_qspi_resources), - .resource = m520x_qspi_resources, - .dev.platform_data = &m520x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m520x_qspi_init(void) { @@ -214,54 +34,28 @@ static void __init m520x_qspi_init(void) par &= 0x00ff; writew(par, MCF_GPIO_PAR_UART); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m520x_devices[] __initdata = { - &m520x_uart, - &m520x_fec, -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m520x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ -static void __init m520x_uart_init_line(int line, int irq) +static void __init m520x_uarts_init(void) { u16 par; u8 par2; - switch (line) { - case 0: - par = readw(MCF_GPIO_PAR_UART); - par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | - MCF_GPIO_PAR_UART_PAR_URXD0; - writew(par, MCF_GPIO_PAR_UART); - break; - case 1: - par = readw(MCF_GPIO_PAR_UART); - par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | - MCF_GPIO_PAR_UART_PAR_URXD1; - writew(par, MCF_GPIO_PAR_UART); - break; - case 2: - par2 = readb(MCF_GPIO_PAR_FECI2C); - par2 &= ~0x0F; - par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 | - MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2; - writeb(par2, MCF_GPIO_PAR_FECI2C); - break; - } -} - -static void __init m520x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m520x_uart_platform); - int line; + /* UART0 and UART1 GPIO pin setup */ + par = readw(MCF_GPIO_PAR_UART); + par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | MCF_GPIO_PAR_UART_PAR_URXD0; + par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | MCF_GPIO_PAR_UART_PAR_URXD1; + writew(par, MCF_GPIO_PAR_UART); - for (line = 0; (line < nrlines); line++) - m520x_uart_init_line(line, m520x_uart_platform[line].irq); + /* UART1 GPIO pin setup */ + par2 = readb(MCF_GPIO_PAR_FECI2C); + par2 &= ~0x0F; + par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 | + MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2; + writeb(par2, MCF_GPIO_PAR_FECI2C); } /***************************************************************************/ @@ -280,32 +74,14 @@ static void __init m520x_fec_init(void) /***************************************************************************/ -static void m520x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m520x_cpu_reset; + mach_sched_init = hw_timer_init; m520x_uarts_init(); m520x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m520x_qspi_init(); #endif } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c index 71f4436ec809..c8b405d5a961 100644 --- a/arch/m68k/platform/523x/config.c +++ b/arch/m68k/platform/523x/config.c @@ -16,215 +16,13 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m523x_uart_platform[] = { - { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, - }, - { }, -}; - -static struct platform_device m523x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m523x_uart_platform, -}; - -static struct resource m523x_fec_resources[] = { - { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 64 + 23, - .end = 64 + 23, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 27, - .end = 64 + 27, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 29, - .end = 64 + 29, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m523x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m523x_fec_resources), - .resource = m523x_fec_resources, -}; - -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m523x_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#define MCFQSPI_CS0 91 -#define MCFQSPI_CS1 92 -#define MCFQSPI_CS2 103 -#define MCFQSPI_CS3 99 - -static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m523x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m523x_cs_control = { - .setup = m523x_cs_setup, - .teardown = m523x_cs_teardown, - .select = m523x_cs_select, - .deselect = m523x_cs_deselect, -}; - -static struct mcfqspi_platform_data m523x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m523x_cs_control, -}; - -static struct platform_device m523x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m523x_qspi_resources), - .resource = m523x_qspi_resources, - .dev.platform_data = &m523x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m523x_qspi_init(void) { @@ -237,15 +35,8 @@ static void __init m523x_qspi_init(void) par &= 0x3f3f; writew(par, MCFGPIO_PAR_TIMER); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m523x_devices[] __initdata = { - &m523x_uart, - &m523x_fec, -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m523x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -263,31 +54,13 @@ static void __init m523x_fec_init(void) /***************************************************************************/ -static void m523x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m523x_cpu_reset; -} - -/***************************************************************************/ - -static int __init init_BSP(void) -{ + mach_sched_init = hw_timer_init; m523x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m523x_qspi_init(); #endif - platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); - return 0; } -arch_initcall(init_BSP); - /***************************************************************************/ diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index ceb31e5744a6..bbf05135bb98 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c @@ -12,34 +12,13 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> +#include <linux/platform_device.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m5249_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, - }, - { }, -}; - -static struct platform_device m5249_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5249_uart_platform, -}; - #ifdef CONFIG_M5249C3 static struct resource m5249_smc91x_resources[] = { @@ -64,153 +43,15 @@ static struct platform_device m5249_smc91x = { #endif /* CONFIG_M5249C3 */ -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m5249_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_QSPI, - .end = MCF_IRQ_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#define MCFQSPI_CS0 29 -#define MCFQSPI_CS1 24 -#define MCFQSPI_CS2 21 -#define MCFQSPI_CS3 22 - -static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m5249_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m5249_cs_control = { - .setup = m5249_cs_setup, - .teardown = m5249_cs_teardown, - .select = m5249_cs_select, - .deselect = m5249_cs_deselect, +static struct platform_device *m5249_devices[] __initdata = { +#ifdef CONFIG_M5249C3 + &m5249_smc91x, +#endif }; -static struct mcfqspi_platform_data m5249_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m5249_cs_control, -}; +/***************************************************************************/ -static struct platform_device m5249_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m5249_qspi_resources), - .resource = m5249_qspi_resources, - .dev.platform_data = &m5249_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m5249_qspi_init(void) { @@ -219,42 +60,8 @@ static void __init m5249_qspi_init(void) MCF_MBAR + MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m5249_devices[] __initdata = { - &m5249_uart, -#ifdef CONFIG_M5249C3 - &m5249_smc91x, -#endif -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m5249_qspi, -#endif -}; - -/***************************************************************************/ - -static void __init m5249_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - -static void __init m5249_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5249_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5249_uart_init_line(line, m5249_uart_platform[line].irq); -} +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ @@ -276,43 +83,14 @@ static void __init m5249_smc91x_init(void) /***************************************************************************/ -static void __init m5249_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - -void m5249_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m5249_cpu_reset; - m5249_timers_init(); - m5249_uarts_init(); + mach_sched_init = hw_timer_init; + #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m5249_qspi_init(); #endif } diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c index 65bb582734e1..e68bc7a148eb 100644 --- a/arch/m68k/platform/5272/config.c +++ b/arch/m68k/platform/5272/config.c @@ -30,84 +30,18 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static struct mcf_platform_uart m5272_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = MCF_IRQ_UART1, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = MCF_IRQ_UART2, - }, - { }, -}; - -static struct platform_device m5272_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5272_uart_platform, -}; - -static struct resource m5272_fec_resources[] = { - { - .start = MCF_MBAR + 0x840, - .end = MCF_MBAR + 0x840 + 0x1cf, - .flags = IORESOURCE_MEM, - }, - { - .start = MCF_IRQ_ERX, - .end = MCF_IRQ_ERX, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_ETX, - .end = MCF_IRQ_ETX, - .flags = IORESOURCE_IRQ, - }, - { - .start = MCF_IRQ_ENTC, - .end = MCF_IRQ_ENTC, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m5272_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m5272_fec_resources), - .resource = m5272_fec_resources, -}; - -static struct platform_device *m5272_devices[] __initdata = { - &m5272_uart, - &m5272_fec, -}; - -/***************************************************************************/ - -static void __init m5272_uart_init_line(int line, int irq) +static void __init m5272_uarts_init(void) { u32 v; - if ((line >= 0) && (line < 2)) { - /* Enable the output lines for the serial ports */ - v = readl(MCF_MBAR + MCFSIM_PBCNT); - v = (v & ~0x000000ff) | 0x00000055; - writel(v, MCF_MBAR + MCFSIM_PBCNT); - - v = readl(MCF_MBAR + MCFSIM_PDCNT); - v = (v & ~0x000003fc) | 0x000002a8; - writel(v, MCF_MBAR + MCFSIM_PDCNT); - } -} - -static void __init m5272_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5272_uart_platform); - int line; + /* Enable the output lines for the serial ports */ + v = readl(MCF_MBAR + MCFSIM_PBCNT); + v = (v & ~0x000000ff) | 0x00000055; + writel(v, MCF_MBAR + MCFSIM_PBCNT); - for (line = 0; (line < nrlines); line++) - m5272_uart_init_line(line, m5272_uart_platform[line].irq); + v = readl(MCF_MBAR + MCFSIM_PDCNT); + v = (v & ~0x000003fc) | 0x000002a8; + writel(v, MCF_MBAR + MCFSIM_PDCNT); } /***************************************************************************/ @@ -146,6 +80,7 @@ void __init config_BSP(char *commandp, int size) #endif mach_reset = m5272_cpu_reset; + mach_sched_init = hw_timer_init; } /***************************************************************************/ @@ -167,7 +102,6 @@ static int __init init_BSP(void) { m5272_uarts_init(); fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); - platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices)); return 0; } diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c index 3ebc769cefda..7ed848c3b848 100644 --- a/arch/m68k/platform/527x/config.c +++ b/arch/m68k/platform/527x/config.c @@ -16,253 +16,14 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m527x_uart_platform[] = { - { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, - }, - { }, -}; - -static struct platform_device m527x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m527x_uart_platform, -}; - -static struct resource m527x_fec0_resources[] = { - { - .start = MCFFEC_BASE0, - .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 64 + 23, - .end = 64 + 23, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 27, - .end = 64 + 27, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 29, - .end = 64 + 29, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource m527x_fec1_resources[] = { - { - .start = MCFFEC_BASE1, - .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 128 + 23, - .end = 128 + 23, - .flags = IORESOURCE_IRQ, - }, - { - .start = 128 + 27, - .end = 128 + 27, - .flags = IORESOURCE_IRQ, - }, - { - .start = 128 + 29, - .end = 128 + 29, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m527x_fec[] = { - { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m527x_fec0_resources), - .resource = m527x_fec0_resources, - }, - { - .name = "fec", - .id = 1, - .num_resources = ARRAY_SIZE(m527x_fec1_resources), - .resource = m527x_fec1_resources, - }, -}; - -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m527x_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#if defined(CONFIG_M5271) -#define MCFQSPI_CS0 91 -#define MCFQSPI_CS1 92 -#define MCFQSPI_CS2 99 -#define MCFQSPI_CS3 103 -#elif defined(CONFIG_M5275) -#define MCFQSPI_CS0 59 -#define MCFQSPI_CS1 60 -#define MCFQSPI_CS2 61 -#define MCFQSPI_CS3 62 -#endif - -static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m527x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, cs_high); - break; - } -} - -static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - switch (chip_select) { - case 0: - gpio_set_value(MCFQSPI_CS0, !cs_high); - break; - case 1: - gpio_set_value(MCFQSPI_CS1, !cs_high); - break; - case 2: - gpio_set_value(MCFQSPI_CS2, !cs_high); - break; - case 3: - gpio_set_value(MCFQSPI_CS3, !cs_high); - break; - } -} - -static struct mcfqspi_cs_control m527x_cs_control = { - .setup = m527x_cs_setup, - .teardown = m527x_cs_teardown, - .select = m527x_cs_select, - .deselect = m527x_cs_deselect, -}; - -static struct mcfqspi_platform_data m527x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m527x_cs_control, -}; - -static struct platform_device m527x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m527x_qspi_resources), - .resource = m527x_qspi_resources, - .dev.platform_data = &m527x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m527x_qspi_init(void) { @@ -280,50 +41,23 @@ static void __init m527x_qspi_init(void) writew(0x003e, MCFGPIO_PAR_QSPI); #endif } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m527x_devices[] __initdata = { - &m527x_uart, - &m527x_fec[0], -#ifdef CONFIG_FEC2 - &m527x_fec[1], -#endif -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m527x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ -static void __init m527x_uart_init_line(int line, int irq) +static void __init m527x_uarts_init(void) { u16 sepmask; - if ((line < 0) || (line > 2)) - return; - /* * External Pin Mask Setting & Enable External Pin for Interface */ sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); - if (line == 0) - sepmask |= UART0_ENABLE_MASK; - else if (line == 1) - sepmask |= UART1_ENABLE_MASK; - else if (line == 2) - sepmask |= UART2_ENABLE_MASK; + sepmask |= UART0_ENABLE_MASK | UART1_ENABLE_MASK | UART2_ENABLE_MASK; writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART); } -static void __init m527x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m527x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m527x_uart_init_line(line, m527x_uart_platform[line].irq); -} - /***************************************************************************/ static void __init m527x_fec_init(void) @@ -353,32 +87,14 @@ static void __init m527x_fec_init(void) /***************************************************************************/ -static void m527x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { - mach_reset = m527x_cpu_reset; + mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m527x_qspi_init(); #endif } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c index 7abe77a2f3e3..d4492926614c 100644 --- a/arch/m68k/platform/528x/config.c +++ b/arch/m68k/platform/528x/config.c @@ -17,229 +17,33 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m528x_uart_platform[] = { - { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, - }, - { }, -}; - -static struct platform_device m528x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m528x_uart_platform, -}; - -static struct resource m528x_fec_resources[] = { - { - .start = MCFFEC_BASE, - .end = MCFFEC_BASE + MCFFEC_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 64 + 23, - .end = 64 + 23, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 27, - .end = 64 + 27, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 29, - .end = 64 + 29, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m528x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m528x_fec_resources), - .resource = m528x_fec_resources, -}; - -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m528x_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#define MCFQSPI_CS0 147 -#define MCFQSPI_CS1 148 -#define MCFQSPI_CS2 149 -#define MCFQSPI_CS3 150 - -static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); - goto fail3; - } - status = gpio_direction_output(MCFQSPI_CS3, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); - goto fail4; - } - - return 0; - -fail4: - gpio_free(MCFQSPI_CS3); -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS3); - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m528x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); -} - -static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); -} - -static struct mcfqspi_cs_control m528x_cs_control = { - .setup = m528x_cs_setup, - .teardown = m528x_cs_teardown, - .select = m528x_cs_select, - .deselect = m528x_cs_deselect, -}; - -static struct mcfqspi_platform_data m528x_qspi_data = { - .bus_num = 0, - .num_chipselect = 4, - .cs_control = &m528x_cs_control, -}; - -static struct platform_device m528x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m528x_qspi_resources), - .resource = m528x_qspi_resources, - .dev.platform_data = &m528x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m528x_qspi_init(void) { /* setup Port QS for QSPI with gpio CS control */ __raw_writeb(0x07, MCFGPIO_PQSPAR); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ -static struct platform_device *m528x_devices[] __initdata = { - &m528x_uart, - &m528x_fec, -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m528x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ -static void __init m528x_uart_init_line(int line, int irq) +static void __init m528x_uarts_init(void) { u8 port; - if ((line < 0) || (line > 2)) - return; - /* make sure PUAPAR is set for UART0 and UART1 */ - if (line < 2) { - port = readb(MCF5282_GPIO_PUAPAR); - port |= (0x03 << (line * 2)); - writeb(port, MCF5282_GPIO_PUAPAR); - } -} - -static void __init m528x_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m528x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m528x_uart_init_line(line, m528x_uart_platform[line].irq); + port = readb(MCF5282_GPIO_PUAPAR); + port |= 0x03 | (0x03 << 2); + writeb(port, MCF5282_GPIO_PUAPAR); } /***************************************************************************/ @@ -256,14 +60,6 @@ static void __init m528x_fec_init(void) /***************************************************************************/ -static void m528x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR); -} - -/***************************************************************************/ - #ifdef CONFIG_WILDFIRE void wildfire_halt(void) { @@ -299,22 +95,12 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_WILDFIREMOD mach_halt = wildfiremod_halt; #endif -} - -/***************************************************************************/ - -static int __init init_BSP(void) -{ - mach_reset = m528x_cpu_reset; + mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) +#ifdef CONFIG_SPI_COLDFIRE_QSPI m528x_qspi_init(); #endif - platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); - return 0; } -arch_initcall(init_BSP); - /***************************************************************************/ diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 00900ac06a9c..a568d2870d15 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c @@ -16,7 +16,6 @@ #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> #include <asm/mcfwdebug.h> /***************************************************************************/ @@ -29,82 +28,6 @@ unsigned char ledbank = 0xff; /***************************************************************************/ -static struct mcf_platform_uart m5307_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, - }, - { }, -}; - -static struct platform_device m5307_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5307_uart_platform, -}; - -static struct platform_device *m5307_devices[] __initdata = { - &m5307_uart, -}; - -/***************************************************************************/ - -static void __init m5307_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - -static void __init m5307_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5307_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5307_uart_init_line(line, m5307_uart_platform[line].irq); -} - -/***************************************************************************/ - -static void __init m5307_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - -void m5307_cpu_reset(void) -{ - local_irq_disable(); - /* Set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { #if defined(CONFIG_NETtel) || \ @@ -114,9 +37,7 @@ void __init config_BSP(char *commandp, int size) commandp[size-1] = 0; #endif - mach_reset = m5307_cpu_reset; - m5307_timers_init(); - m5307_uarts_init(); + mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); @@ -135,13 +56,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c index ca51323f957b..2bec3477b739 100644 --- a/arch/m68k/platform/532x/config.c +++ b/arch/m68k/platform/532x/config.c @@ -21,214 +21,33 @@ #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> #include <asm/mcfdma.h> #include <asm/mcfwdebug.h> -#include <asm/mcfqspi.h> /***************************************************************************/ -static struct mcf_platform_uart m532x_uart_platform[] = { - { - .mapbase = MCFUART_BASE1, - .irq = MCFINT_VECBASE + MCFINT_UART0, - }, - { - .mapbase = MCFUART_BASE2, - .irq = MCFINT_VECBASE + MCFINT_UART1, - }, - { - .mapbase = MCFUART_BASE3, - .irq = MCFINT_VECBASE + MCFINT_UART2, - }, - { }, -}; - -static struct platform_device m532x_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m532x_uart_platform, -}; - -static struct resource m532x_fec_resources[] = { - { - .start = 0xfc030000, - .end = 0xfc0307ff, - .flags = IORESOURCE_MEM, - }, - { - .start = 64 + 36, - .end = 64 + 36, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 40, - .end = 64 + 40, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 42, - .end = 64 + 42, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device m532x_fec = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(m532x_fec_resources), - .resource = m532x_fec_resources, -}; - -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) -static struct resource m532x_qspi_resources[] = { - { - .start = MCFQSPI_IOBASE, - .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MCFINT_VECBASE + MCFINT_QSPI, - .end = MCFINT_VECBASE + MCFINT_QSPI, - .flags = IORESOURCE_IRQ, - }, -}; - -#define MCFQSPI_CS0 84 -#define MCFQSPI_CS1 85 -#define MCFQSPI_CS2 86 - -static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) -{ - int status; - - status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); - goto fail0; - } - status = gpio_direction_output(MCFQSPI_CS0, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); - goto fail1; - } - - status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); - goto fail1; - } - status = gpio_direction_output(MCFQSPI_CS1, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); - goto fail2; - } - - status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); - if (status) { - pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); - goto fail2; - } - status = gpio_direction_output(MCFQSPI_CS2, 1); - if (status) { - pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); - goto fail3; - } - - return 0; - -fail3: - gpio_free(MCFQSPI_CS2); -fail2: - gpio_free(MCFQSPI_CS1); -fail1: - gpio_free(MCFQSPI_CS0); -fail0: - return status; -} - -static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control) -{ - gpio_free(MCFQSPI_CS2); - gpio_free(MCFQSPI_CS1); - gpio_free(MCFQSPI_CS0); -} - -static void m532x_cs_select(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); -} - -static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control, - u8 chip_select, bool cs_high) -{ - gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); -} - -static struct mcfqspi_cs_control m532x_cs_control = { - .setup = m532x_cs_setup, - .teardown = m532x_cs_teardown, - .select = m532x_cs_select, - .deselect = m532x_cs_deselect, -}; - -static struct mcfqspi_platform_data m532x_qspi_data = { - .bus_num = 0, - .num_chipselect = 3, - .cs_control = &m532x_cs_control, -}; - -static struct platform_device m532x_qspi = { - .name = "mcfqspi", - .id = 0, - .num_resources = ARRAY_SIZE(m532x_qspi_resources), - .resource = m532x_qspi_resources, - .dev.platform_data = &m532x_qspi_data, -}; +#ifdef CONFIG_SPI_COLDFIRE_QSPI static void __init m532x_qspi_init(void) { /* setup QSPS pins for QSPI with gpio CS control */ writew(0x01f0, MCF_GPIO_PAR_QSPI); } -#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ - -static struct platform_device *m532x_devices[] __initdata = { - &m532x_uart, - &m532x_fec, -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - &m532x_qspi, -#endif -}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ /***************************************************************************/ -static void __init m532x_uart_init_line(int line, int irq) -{ - if (line == 0) { - /* GPIO initialization */ - MCF_GPIO_PAR_UART |= 0x000F; - } else if (line == 1) { - /* GPIO initialization */ - MCF_GPIO_PAR_UART |= 0x0FF0; - } -} - static void __init m532x_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m532x_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m532x_uart_init_line(line, m532x_uart_platform[line].irq); + /* UART GPIO initialization */ + MCF_GPIO_PAR_UART |= 0x0FFF; } + /***************************************************************************/ static void __init m532x_fec_init(void) @@ -242,14 +61,6 @@ static void __init m532x_fec_init(void) /***************************************************************************/ -static void m532x_cpu_reset(void) -{ - local_irq_disable(); - __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); -} - -/***************************************************************************/ - void __init config_BSP(char *commandp, int size) { #if !defined(CONFIG_BOOTPARAM) @@ -263,6 +74,13 @@ void __init config_BSP(char *commandp, int size) } #endif + mach_sched_init = hw_timer_init; + m532x_uarts_init(); + m532x_fec_init(); +#ifdef CONFIG_SPI_COLDFIRE_QSPI + m532x_qspi_init(); +#endif + #ifdef CONFIG_BDM_DISABLE /* * Disable the BDM clocking. This also turns off most of the rest of @@ -274,21 +92,6 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - m532x_uarts_init(); - m532x_fec_init(); -#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) - m532x_qspi_init(); -#endif - platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ /* Board initialization */ /***************************************************************************/ /* diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index 70ea789a400c..bb6c746ae819 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c @@ -16,91 +16,12 @@ #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> - -/***************************************************************************/ - -static struct mcf_platform_uart m5407_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, - }, - { }, -}; - -static struct platform_device m5407_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m5407_uart_platform, -}; - -static struct platform_device *m5407_devices[] __initdata = { - &m5407_uart, -}; - -/***************************************************************************/ - -static void __init m5407_uart_init_line(int line, int irq) -{ - if (line == 0) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART0); - } else if (line == 1) { - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); - mcf_mapirq2imr(irq, MCFINTC_UART1); - } -} - -static void __init m5407_uarts_init(void) -{ - const int nrlines = ARRAY_SIZE(m5407_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m5407_uart_init_line(line, m5407_uart_platform[line].irq); -} - -/***************************************************************************/ - -static void __init m5407_timers_init(void) -{ - /* Timer1 is always used as system timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); - mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); - -#ifdef CONFIG_HIGHPROFILE - /* Timer2 is to be used as a high speed profile timer */ - writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); - mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); -#endif -} - -/***************************************************************************/ - -void m5407_cpu_reset(void) -{ - local_irq_disable(); - /* set watchdog to soft reset, and enabled */ - __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); - for (;;) - /* wait for watchdog to timeout */; -} /***************************************************************************/ void __init config_BSP(char *commandp, int size) { - mach_reset = m5407_cpu_reset; - m5407_timers_init(); - m5407_uarts_init(); + mach_sched_init = hw_timer_init; /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); @@ -110,13 +31,3 @@ void __init config_BSP(char *commandp, int size) } /***************************************************************************/ - -static int __init init_BSP(void) -{ - platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c index ee043540bfa2..2081c6cbb3de 100644 --- a/arch/m68k/platform/54xx/config.c +++ b/arch/m68k/platform/54xx/config.c @@ -27,64 +27,17 @@ /***************************************************************************/ -static struct mcf_platform_uart m54xx_uart_platform[] = { - { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 64 + 35, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 64 + 34, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE3, - .irq = 64 + 33, - }, - { - .mapbase = MCF_MBAR + MCFUART_BASE4, - .irq = 64 + 32, - }, -}; - -static struct platform_device m54xx_uart = { - .name = "mcfuart", - .id = 0, - .dev.platform_data = m54xx_uart_platform, -}; - -static struct platform_device *m54xx_devices[] __initdata = { - &m54xx_uart, -}; - - -/***************************************************************************/ - -static void __init m54xx_uart_init_line(int line, int irq) -{ - int rts_cts; - - /* enable io pins */ - switch (line) { - case 0: - rts_cts = 0; break; - case 1: - rts_cts = MCF_PAR_PSC_RTS_RTS; break; - case 2: - rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break; - case 3: - rts_cts = 0; break; - } - __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD, - MCF_MBAR + MCF_PAR_PSC(line)); -} - static void __init m54xx_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m54xx_uart_platform); - int line; - - for (line = 0; (line < nrlines); line++) - m54xx_uart_init_line(line, m54xx_uart_platform[line].irq); + /* enable io pins */ + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, + MCF_MBAR + MCF_PAR_PSC(0)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS, + MCF_MBAR + MCF_PAR_PSC(1)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS | + MCF_PAR_PSC_CTS_CTS, MCF_MBAR + MCF_PAR_PSC(2)); + __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, + MCF_MBAR + MCF_PAR_PSC(3)); } /***************************************************************************/ @@ -145,18 +98,8 @@ void __init config_BSP(char *commandp, int size) mmu_context_init(); #endif mach_reset = mcf54xx_reset; + mach_sched_init = hw_timer_init; m54xx_uarts_init(); } /***************************************************************************/ - -static int __init init_BSP(void) -{ - - platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices)); - return 0; -} - -arch_initcall(init_BSP); - -/***************************************************************************/ diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c index d70bf2623db1..8c20e891e981 100644 --- a/arch/m68k/platform/68328/config.c +++ b/arch/m68k/platform/68328/config.c @@ -17,7 +17,7 @@ #include <linux/types.h> #include <linux/kernel.h> -#include <asm/system.h> +#include <linux/rtc.h> #include <asm/machdep.h> #include <asm/MC68328.h> #if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD) @@ -26,7 +26,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ @@ -48,7 +48,7 @@ void config_BSP(char *command, int len) printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n"); printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n"); - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68328_reset; } diff --git a/arch/m68k/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c index 4bd456531f91..b3810febb3e3 100644 --- a/arch/m68k/platform/68328/ints.c +++ b/arch/m68k/platform/68328/ints.c @@ -68,8 +68,6 @@ asmlinkage irqreturn_t inthandler5(void); asmlinkage irqreturn_t inthandler6(void); asmlinkage irqreturn_t inthandler7(void); -extern e_vector *_ramvec; - /* The 68k family did not have a good way to determine the source * of interrupts until later in the family. The EC000 core does * not provide the vector number on the stack, we vector everything diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c index f2678866067b..c801c172b822 100644 --- a/arch/m68k/platform/68328/timers.c +++ b/arch/m68k/platform/68328/timers.c @@ -20,8 +20,8 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/clocksource.h> +#include <linux/rtc.h> #include <asm/setup.h> -#include <asm/system.h> #include <asm/pgtable.h> #include <asm/machdep.h> #include <asm/MC68VZ328.h> @@ -119,14 +119,17 @@ void hw_timer_init(void) /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec) +int m68328_hwclk(int set, struct rtc_time *t) { - long now = RTCTIME; - - *year = *mon = *day = 1; - *hour = (now >> 24) % 24; - *min = (now >> 16) % 60; - *sec = now % 60; + if (!set) { + long now = RTCTIME; + t->tm_year = t->tm_mon = t->tm_mday = 1; + t->tm_hour = (now >> 24) % 24; + t->tm_min = (now >> 16) % 60; + t->tm_sec = now % 60; + } + + return 0; } /***************************************************************************/ diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c index 9dd5bca38749..255fc03913e9 100644 --- a/arch/m68k/platform/68360/config.c +++ b/arch/m68k/platform/68360/config.c @@ -18,7 +18,6 @@ #include <linux/irq.h> #include <asm/setup.h> -#include <asm/system.h> #include <asm/pgtable.h> #include <asm/machdep.h> #include <asm/m68360.h> @@ -103,11 +102,6 @@ void hw_timer_init(void) pquicc->timer_tgcr = tgcr_save; } -void BSP_gettod (int *yearp, int *monp, int *dayp, - int *hourp, int *minp, int *secp) -{ -} - int BSP_set_clock_mmss(unsigned long nowtime) { #if 0 @@ -181,6 +175,5 @@ void config_BSP(char *command, int len) scc1_hwaddr = "\00\01\02\03\04\05"; #endif - mach_gettod = BSP_gettod; - mach_reset = BSP_reset; + mach_reset = BSP_reset; } diff --git a/arch/m68k/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c index 7b40202d9638..8cd42692331b 100644 --- a/arch/m68k/platform/68360/ints.c +++ b/arch/m68k/platform/68360/ints.c @@ -32,8 +32,6 @@ asmlinkage void trap(void); asmlinkage void bad_interrupt(void); asmlinkage void inthandler(void); -extern void *_ramvec[]; - static void intc_irq_unmask(struct irq_data *d) { pquicc->intr_cimr |= (1 << d->irq); diff --git a/arch/m68k/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c index 1be1a16f6896..4f158d551f02 100644 --- a/arch/m68k/platform/68EZ328/config.c +++ b/arch/m68k/platform/68EZ328/config.c @@ -15,7 +15,7 @@ #include <linux/types.h> #include <linux/kernel.h> -#include <asm/system.h> +#include <linux/rtc.h> #include <asm/pgtable.h> #include <asm/machdep.h> #include <asm/MC68EZ328.h> @@ -25,7 +25,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ @@ -69,7 +69,7 @@ void config_BSP(char *command, int len) else command[0] = 0; #endif - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68ez328_reset; } diff --git a/arch/m68k/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c index eabaabe8af36..2ed8dc305e42 100644 --- a/arch/m68k/platform/68VZ328/config.c +++ b/arch/m68k/platform/68VZ328/config.c @@ -20,8 +20,8 @@ #include <linux/netdevice.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/rtc.h> -#include <asm/system.h> #include <asm/pgtable.h> #include <asm/machdep.h> #include <asm/MC68VZ328.h> @@ -33,7 +33,7 @@ /***************************************************************************/ -void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); +int m68328_hwclk(int set, struct rtc_time *t); /***************************************************************************/ /* Init Drangon Engine hardware */ @@ -181,7 +181,7 @@ void config_BSP(char *command, int size) init_hardware(command, size); - mach_gettod = m68328_timer_gettod; + mach_hwclk = m68328_hwclk; mach_reset = m68vz328_reset; } diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile index a8967baabd72..a0815c61dec1 100644 --- a/arch/m68k/platform/coldfire/Makefile +++ b/arch/m68k/platform/coldfire/Makefile @@ -14,18 +14,18 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o -obj-$(CONFIG_M5206) += timers.o intc.o -obj-$(CONFIG_M5206e) += timers.o intc.o -obj-$(CONFIG_M520x) += pit.o intc-simr.o -obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o -obj-$(CONFIG_M5249) += timers.o intc.o -obj-$(CONFIG_M527x) += pit.o intc-2.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o +obj-$(CONFIG_M5206) += timers.o intc.o reset.o +obj-$(CONFIG_M5206e) += timers.o intc.o reset.o +obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o +obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o +obj-$(CONFIG_M5249) += timers.o intc.o reset.o +obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o obj-$(CONFIG_M5272) += timers.o -obj-$(CONFIG_M528x) += pit.o intc-2.o -obj-$(CONFIG_M5307) += timers.o intc.o -obj-$(CONFIG_M532x) += timers.o intc-simr.o -obj-$(CONFIG_M5407) += timers.o intc.o +obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o +obj-$(CONFIG_M5307) += timers.o intc.o reset.o +obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o +obj-$(CONFIG_M5407) += timers.o intc.o reset.o obj-$(CONFIG_M54xx) += sltimers.o intc-2.o obj-y += pinmux.o gpio.o diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c new file mode 100644 index 000000000000..fa50c48292ff --- /dev/null +++ b/arch/m68k/platform/coldfire/device.c @@ -0,0 +1,318 @@ +/* + * device.c -- common ColdFire SoC device support + * + * (C) Copyright 2011, Greg Ungerer <gerg@uclinux.org> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/spi/spi.h> +#include <linux/gpio.h> +#include <asm/traps.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> +#include <asm/mcfuart.h> +#include <asm/mcfqspi.h> + +/* + * All current ColdFire parts contain from 2, 3 or 4 UARTS. + */ +static struct mcf_platform_uart mcf_uart_platform_data[] = { + { + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, + }, + { + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, + }, +#ifdef MCFUART_BASE2 + { + .mapbase = MCFUART_BASE2, + .irq = MCF_IRQ_UART2, + }, +#endif +#ifdef MCFUART_BASE3 + { + .mapbase = MCFUART_BASE3, + .irq = MCF_IRQ_UART3, + }, +#endif + { }, +}; + +static struct platform_device mcf_uart = { + .name = "mcfuart", + .id = 0, + .dev.platform_data = mcf_uart_platform_data, +}; + +#ifdef CONFIG_FEC +/* + * Some ColdFire cores contain the Fast Ethernet Controller (FEC) + * block. It is Freescale's own hardware block. Some ColdFires + * have 2 of these. + */ +static struct resource mcf_fec0_resources[] = { + { + .start = MCFFEC_BASE0, + .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_FECRX0, + .end = MCF_IRQ_FECRX0, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECTX0, + .end = MCF_IRQ_FECTX0, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECENTC0, + .end = MCF_IRQ_FECENTC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mcf_fec0 = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_fec0_resources), + .resource = mcf_fec0_resources, +}; + +#ifdef MCFFEC_BASE1 +static struct resource mcf_fec1_resources[] = { + { + .start = MCFFEC_BASE1, + .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_FECRX1, + .end = MCF_IRQ_FECRX1, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECTX1, + .end = MCF_IRQ_FECTX1, + .flags = IORESOURCE_IRQ, + }, + { + .start = MCF_IRQ_FECENTC1, + .end = MCF_IRQ_FECENTC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mcf_fec1 = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_fec1_resources), + .resource = mcf_fec1_resources, +}; +#endif /* MCFFEC_BASE1 */ +#endif /* CONFIG_FEC */ + +#ifdef CONFIG_SPI_COLDFIRE_QSPI +/* + * The ColdFire QSPI module is an SPI protocol hardware block used + * on a number of different ColdFire CPUs. + */ +static struct resource mcf_qspi_resources[] = { + { + .start = MCFQSPI_BASE, + .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MCF_IRQ_QSPI, + .end = MCF_IRQ_QSPI, + .flags = IORESOURCE_IRQ, + }, +}; + +static int mcf_cs_setup(struct mcfqspi_cs_control *cs_control) +{ + int status; + + status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); + goto fail0; + } + status = gpio_direction_output(MCFQSPI_CS0, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); + goto fail1; + } + + status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); + goto fail1; + } + status = gpio_direction_output(MCFQSPI_CS1, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); + goto fail2; + } + + status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); + goto fail2; + } + status = gpio_direction_output(MCFQSPI_CS2, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); + goto fail3; + } + +#ifdef MCFQSPI_CS3 + status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); + if (status) { + pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); + goto fail3; + } + status = gpio_direction_output(MCFQSPI_CS3, 1); + if (status) { + pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); + gpio_free(MCFQSPI_CS3); + goto fail3; + } +#endif + + return 0; + +fail3: + gpio_free(MCFQSPI_CS2); +fail2: + gpio_free(MCFQSPI_CS1); +fail1: + gpio_free(MCFQSPI_CS0); +fail0: + return status; +} + +static void mcf_cs_teardown(struct mcfqspi_cs_control *cs_control) +{ +#ifdef MCFQSPI_CS3 + gpio_free(MCFQSPI_CS3); +#endif + gpio_free(MCFQSPI_CS2); + gpio_free(MCFQSPI_CS1); + gpio_free(MCFQSPI_CS0); +} + +static void mcf_cs_select(struct mcfqspi_cs_control *cs_control, + u8 chip_select, bool cs_high) +{ + switch (chip_select) { + case 0: + gpio_set_value(MCFQSPI_CS0, cs_high); + break; + case 1: + gpio_set_value(MCFQSPI_CS1, cs_high); + break; + case 2: + gpio_set_value(MCFQSPI_CS2, cs_high); + break; +#ifdef MCFQSPI_CS3 + case 3: + gpio_set_value(MCFQSPI_CS3, cs_high); + break; +#endif + } +} + +static void mcf_cs_deselect(struct mcfqspi_cs_control *cs_control, + u8 chip_select, bool cs_high) +{ + switch (chip_select) { + case 0: + gpio_set_value(MCFQSPI_CS0, !cs_high); + break; + case 1: + gpio_set_value(MCFQSPI_CS1, !cs_high); + break; + case 2: + gpio_set_value(MCFQSPI_CS2, !cs_high); + break; +#ifdef MCFQSPI_CS3 + case 3: + gpio_set_value(MCFQSPI_CS3, !cs_high); + break; +#endif + } +} + +static struct mcfqspi_cs_control mcf_cs_control = { + .setup = mcf_cs_setup, + .teardown = mcf_cs_teardown, + .select = mcf_cs_select, + .deselect = mcf_cs_deselect, +}; + +static struct mcfqspi_platform_data mcf_qspi_data = { + .bus_num = 0, + .num_chipselect = 4, + .cs_control = &mcf_cs_control, +}; + +static struct platform_device mcf_qspi = { + .name = "mcfqspi", + .id = 0, + .num_resources = ARRAY_SIZE(mcf_qspi_resources), + .resource = mcf_qspi_resources, + .dev.platform_data = &mcf_qspi_data, +}; +#endif /* CONFIG_SPI_COLDFIRE_QSPI */ + +static struct platform_device *mcf_devices[] __initdata = { + &mcf_uart, +#ifdef CONFIG_FEC + &mcf_fec0, +#ifdef MCFFEC_BASE1 + &mcf_fec1, +#endif +#endif +#ifdef CONFIG_SPI_COLDFIRE_QSPI + &mcf_qspi, +#endif +}; + +/* + * Some ColdFire UARTs let you set the IRQ line to use. + */ +static void __init mcf_uart_set_irq(void) +{ +#ifdef MCFUART_UIVR + /* UART0 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); + + /* UART1 interrupt setup */ + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); + mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); +#endif +} + +static int __init mcf_init_devices(void) +{ + mcf_uart_set_irq(); + platform_add_devices(mcf_devices, ARRAY_SIZE(mcf_devices)); + return 0; +} + +arch_initcall(mcf_init_devices); + diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S index 38f04a3f6207..c3db70ed33b3 100644 --- a/arch/m68k/platform/coldfire/head.S +++ b/arch/m68k/platform/coldfire/head.S @@ -158,6 +158,10 @@ _start: #if defined(CONFIG_UBOOT) movel %sp,_init_sp /* save initial stack pointer */ #endif +#ifdef CONFIG_MBAR + movel #CONFIG_MBAR+1,%d0 /* configured MBAR address */ + movec %d0,%MBAR /* set it */ +#endif /* * Do any platform or board specific setup now. Most boards diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c index 02663d25822d..e62dbbcb10f6 100644 --- a/arch/m68k/platform/coldfire/pit.c +++ b/arch/m68k/platform/coldfire/pit.c @@ -149,7 +149,7 @@ static struct clocksource pit_clk = { /***************************************************************************/ -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id()); cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); diff --git a/arch/m68k/platform/coldfire/reset.c b/arch/m68k/platform/coldfire/reset.c new file mode 100644 index 000000000000..933e54eacc69 --- /dev/null +++ b/arch/m68k/platform/coldfire/reset.c @@ -0,0 +1,50 @@ +/* + * reset.c -- common ColdFire SoC reset support + * + * (C) Copyright 2012, Greg Ungerer <gerg@uclinux.org> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/io.h> +#include <asm/machdep.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> + +/* + * There are 2 common methods amongst the ColdFure parts for reseting + * the CPU. But there are couple of exceptions, the 5272 and the 547x + * have something completely special to them, and we let their specific + * subarch code handle them. + */ + +#ifdef MCFSIM_SYPCR +static void mcf_cpu_reset(void) +{ + local_irq_disable(); + /* Set watchdog to soft reset, and enabled */ + __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); + for (;;) + /* wait for watchdog to timeout */; +} +#endif + +#ifdef MCF_RCR +static void mcf_cpu_reset(void) +{ + local_irq_disable(); + __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); +} +#endif + +static int __init mcf_setup_reset(void) +{ + mach_reset = mcf_cpu_reset; + return 0; +} + +arch_initcall(mcf_setup_reset); diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c index 54e1452f853a..2027fc20b876 100644 --- a/arch/m68k/platform/coldfire/sltimers.c +++ b/arch/m68k/platform/coldfire/sltimers.c @@ -81,12 +81,14 @@ void mcfslt_profile_init(void) static u32 mcfslt_cycles_per_jiffy; static u32 mcfslt_cnt; +static irq_handler_t timer_interrupt; + static irqreturn_t mcfslt_tick(int irq, void *dummy) { /* Reset Slice Timer 0 */ __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR)); mcfslt_cnt += mcfslt_cycles_per_jiffy; - return arch_timer_interrupt(irq, dummy); + return timer_interrupt(irq, dummy); } static struct irqaction mcfslt_timer_irq = { @@ -121,7 +123,7 @@ static struct clocksource mcfslt_clk = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ; /* @@ -136,6 +138,7 @@ void hw_timer_init(void) /* initialize mcfslt_cnt knowing that slice timers count down */ mcfslt_cnt = mcfslt_cycles_per_jiffy; + timer_interrupt = handler; setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq); clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index 0d90da32fcdb..ed96ce50d79f 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c @@ -47,6 +47,27 @@ void coldfire_profile_init(void); static u32 mcftmr_cycles_per_jiffy; static u32 mcftmr_cnt; +static irq_handler_t timer_interrupt; + +/***************************************************************************/ + +static void init_timer_irq(void) +{ +#ifdef MCFSIM_ICR_AUTOVEC + /* Timer1 is always used as system timer */ + writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, + MCF_MBAR + MCFSIM_TIMER1ICR); + mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); + +#ifdef CONFIG_HIGHPROFILE + /* Timer2 is to be used as a high speed profile timer */ + writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, + MCF_MBAR + MCFSIM_TIMER2ICR); + mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); +#endif +#endif /* MCFSIM_ICR_AUTOVEC */ +} + /***************************************************************************/ static irqreturn_t mcftmr_tick(int irq, void *dummy) @@ -55,7 +76,7 @@ static irqreturn_t mcftmr_tick(int irq, void *dummy) __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER)); mcftmr_cnt += mcftmr_cycles_per_jiffy; - return arch_timer_interrupt(irq, dummy); + return timer_interrupt(irq, dummy); } /***************************************************************************/ @@ -94,7 +115,7 @@ static struct clocksource mcftmr_clk = { /***************************************************************************/ -void hw_timer_init(void) +void hw_timer_init(irq_handler_t handler) { __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); mcftmr_cycles_per_jiffy = FREQ / HZ; @@ -110,6 +131,8 @@ void hw_timer_init(void) clocksource_register_hz(&mcftmr_clk, FREQ); + timer_interrupt = handler; + init_timer_irq(); setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); #ifdef CONFIG_HIGHPROFILE diff --git a/arch/m68k/platform/coldfire/vectors.c b/arch/m68k/platform/coldfire/vectors.c index 3a7cc524ecd3..a4dbdecbec7a 100644 --- a/arch/m68k/platform/coldfire/vectors.c +++ b/arch/m68k/platform/coldfire/vectors.c @@ -33,8 +33,6 @@ asmlinkage void dbginterrupt_c(struct frame *fp) /***************************************************************************/ -extern e_vector *_ramvec; - /* Assembler routines */ asmlinkage void buserr(void); asmlinkage void trap(void); |