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authorImran Khan <kimran@codeaurora.org>2017-04-03 13:11:18 +0530
committerGerrit - the friendly Code Review server <code-review@localhost>2017-04-18 08:04:28 -0700
commit7b9683892c75db3778cadb9fde2e92e7e2887d81 (patch)
tree6bccfea4d9a3a4bae208ae8ecfe35217677d719c /arch/arm64/kernel
parent7f0d77b390e15aa9ea4b517aec21a0e88e02f5a0 (diff)
arm64: cache: change ARCH_DMA_MINALIGN and L1_CACHE_SHIFT values
This reverts 'commit 97303480753e ("arm64: Increase the max granular size") and also sets ARM_DMA_MINALIGN to 128. ARCH_DMA_MINALIGN is dependent on L1_CACHE_SHIFT but it should be set to maximum *known* cache line size on ARMv8 systems to avoid DMA coherecy issues. So setting ARM_DMA_MINALIGN to 128. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Change-Id: Ie771d1b693789fce8793538a6efddfe68e2a0043 Patch-mainline: linux-kernel @ 21/03/16, 17:14:03 Signed-off-by: Imran Khan <kimran@codeaurora.org>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r--arch/arm64/kernel/cpufeature.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index cdf1dca64133..f75000996e4c 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -992,9 +992,9 @@ void __init setup_cpu_features(void)
if (!cwg)
pr_warn("No Cache Writeback Granule information, assuming cache line size %d\n",
cls);
- if (L1_CACHE_BYTES < cls)
- pr_warn("L1_CACHE_BYTES smaller than the Cache Writeback Granule (%d < %d)\n",
- L1_CACHE_BYTES, cls);
+ if (ARCH_DMA_MINALIGN < cls)
+ pr_warn("ARCH_DMA_MINALIGN smaller than the Cache Writeback Granule (%d < %d)\n",
+ ARCH_DMA_MINALIGN, cls);
}
static bool __maybe_unused