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authorSrinivasarao P <spathi@codeaurora.org>2019-08-12 10:43:01 +0530
committerSrinivasarao P <spathi@codeaurora.org>2019-08-12 10:43:48 +0530
commit478556932db7a2e4dd19e4da619599fd3d5a56aa (patch)
tree0d87c384868f1f35ee8dfebbcf72722fd542edc9 /arch/arm64/kernel
parent7b0c4ab61ef1dc4eaa00ee0d9b4c50ca0193ad75 (diff)
parent74c82193e89daaa486f49dc8a4f8ed38f0460159 (diff)
Merge android-4.4.189 (74c8219) into msm-4.4
* refs/heads/tmp-74c8219 Linux 4.4.189 x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGS x86/entry/64: Use JMP instead of JMPQ x86/speculation: Enable Spectre v1 swapgs mitigations x86/speculation: Prepare entry code for Spectre v1 swapgs mitigations x86/entry/64: Fix context tracking state warning when load_gs_index fails x86: cpufeatures: Sort feature word 7 spi: bcm2835: Fix 3-wire mode if DMA is enabled block: blk_init_allocated_queue() set q->fq as NULL in the fail case compat_ioctl: pppoe: fix PPPOEIOCSFWD handling bnx2x: Disable multi-cos feature. net/mlx5: Use reversed order when unregister devices net: sched: Fix a possible null-pointer dereference in dequeue_func() tipc: compat: allow tipc commands without arguments net: fix ifindex collision during namespace removal net: bridge: delete local fdb on device init failure atm: iphase: Fix Spectre v1 vulnerability tcp: be more careful in tcp_fragment() HID: Add quirk for HP X1200 PIXART OEM mouse netfilter: nfnetlink_acct: validate NFACCT_QUOTA parameter arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG} arm64: cpufeature: Fix CTR_EL0 field definitions UPSTREAM: net-ipv6-ndisc: add support for RFC7710 RA Captive Portal Identifier Change-Id: I0bdf89783d0c83a3385d77f6b4c6f3d3b3fb0460 Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r--arch/arm64/kernel/cpufeature.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 98602e5bbcfd..cb475b0a3422 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -139,10 +139,12 @@ static struct arm64_ftr_bits ftr_id_aa64mmfr2[] = {
};
static struct arm64_ftr_bits ftr_ctr[] = {
- U_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RAO */
- ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 28, 3, 0),
- U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0), /* CWG */
- U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0), /* ERG */
+ U_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */
+ ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0),
+ U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1), /* DIC */
+ U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1), /* IDC */
+ U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 24, 4, 0), /* CWG */
+ U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 20, 4, 0), /* ERG */
U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 1), /* DminLine */
/*
* Linux can handle differing I-cache policies. Userspace JITs will
@@ -353,6 +355,10 @@ static s64 arm64_ftr_safe_value(struct arm64_ftr_bits *ftrp, s64 new, s64 cur)
case FTR_LOWER_SAFE:
ret = new < cur ? new : cur;
break;
+ case FTR_HIGHER_OR_ZERO_SAFE:
+ if (!cur || !new)
+ break;
+ /* Fallthrough */
case FTR_HIGHER_SAFE:
ret = new > cur ? new : cur;
break;