diff options
| author | Jack Pham <jackp@codeaurora.org> | 2015-12-11 12:11:17 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 11:06:05 -0700 |
| commit | 810ed727f2c4de4ed7eaa6f33b3992c72fbc324e (patch) | |
| tree | c40eef9cd75ba603a7eb80f0221331824a12bad4 /arch/arm64/boot | |
| parent | 1c3de1655ff020769828540b6acf9f28e6af3cc9 (diff) | |
ARM: dts: msm: Add ref_clk_src to QUSB PHYs on msm8996
The QUSB PHY instances each require a ref clk sourced by PMIC
ln_bb_clk in order to function properly. Since this clock is
shared among other peripherals, make sure the PHYs also can
enable it independently when needed.
Change-Id: Id5837532a2c9249b7babb720483c94734d80b717
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index caa6cb7b17ca..9cfe2a6c90f2 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2067,9 +2067,10 @@ phy_type= "utmi"; clocks = <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>, - <&clock_gcc clk_gcc_qusb2phy_prim_reset>; + <&clock_gcc clk_gcc_qusb2phy_prim_reset>, + <&clock_gcc clk_ln_bb_clk>; - clock-names = "cfg_ahb_clk", "phy_reset"; + clock-names = "cfg_ahb_clk", "phy_reset", "ref_clk_src"; }; qusb_phy1: qusb@7412000 { @@ -2102,9 +2103,10 @@ qcom,hold-reset; clocks = <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>, - <&clock_gcc clk_gcc_qusb2phy_sec_reset>; + <&clock_gcc clk_gcc_qusb2phy_sec_reset>, + <&clock_gcc clk_ln_bb_clk>; - clock-names = "cfg_ahb_clk", "phy_reset"; + clock-names = "cfg_ahb_clk", "phy_reset", "ref_clk_src"; }; ssphy: ssphy@7410000 { |