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authorPrasad Sodagudi <psodagud@codeaurora.org>2015-11-19 15:19:46 +0530
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:48:13 -0700
commitb5bcae491ae5998466ebfc8d41ffe165b4a4b08c (patch)
tree61ee5ef411247ef8e663da3f0976166fddf982c0 /arch/arm/kernel
parentcb8b39f6318241d8461456dfb2c39260be368d05 (diff)
perf: Change PMCR write to read-modify-write
Preserves the bitfields of PMCR(AArch32)/PMCR_EL0(AArch64) during PMU reset. Reset routine should write a 1 to PMCR.C and PMCR.P fields only to reset the counters. Other fields should not be changed as they could be set before PMU initialization and their value must be preserved even after reset. Change-Id: I835bf41f89a8a4691e996e6766aed4b4c8ef4368 Acked-by: Abhiroop Basak <abasak@qti.qualcomm.com> Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/perf_event_v7.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 126dc679b230..5350d91acef5 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -991,7 +991,7 @@ static void armv7pmu_reset(void *info)
}
/* Initialize & Reset PMNC: C and P bits */
- armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
+ armv7_pmnc_write(armv7_pmnc_read() | ARMV7_PMNC_P | ARMV7_PMNC_C);
}
static int armv7_a8_map_event(struct perf_event *event)