diff options
| author | Rohit Vaswani <rvaswani@codeaurora.org> | 2013-02-07 12:15:11 -0800 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-06-15 16:14:16 -0700 |
| commit | d6118c0a9f7ab2b131ca36dd3dbd5634603d14fe (patch) | |
| tree | a77293142bd1a1e0f3292a063f7589d64685b7f1 /arch/arm/include/asm/cacheflush.h | |
| parent | 28aec4463a70576aa6f1e1384dffac119c571321 (diff) | |
Revert "ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range"
This partially reverts 'commit 702b94bff3c505 ("ARM: dma-mapping:
remove dmac_clean_range and dmac_inv_range")'
Some MSM drivers still use the dmac_clean and dmac_inv_range APIs.
Bring back the defines and exports for v7 CPUs.
Change-Id: I69017d73da1065a5eeb9c87c899b6a51be5ebfe6
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
[sramana: resolved minor merge conflicts]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Diffstat (limited to 'arch/arm/include/asm/cacheflush.h')
| -rw-r--r-- | arch/arm/include/asm/cacheflush.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index d5525bfc7e3e..9623a8a87e18 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -94,6 +94,21 @@ * DMA Cache Coherency * =================== * + * dma_inv_range(start, end) + * + * Invalidate (discard) the specified virtual address range. + * May not write back any entries. If 'start' or 'end' + * are not cache line aligned, those lines must be written + * back. + * - start - virtual start address + * - end - virtual end address + * + * dma_clean_range(start, end) + * + * Clean (write back) the specified virtual address range. + * - start - virtual start address + * - end - virtual end address + * * dma_flush_range(start, end) * * Clean and invalidate the specified virtual address range. @@ -115,6 +130,8 @@ struct cpu_cache_fns { void (*dma_map_area)(const void *, size_t, int); void (*dma_unmap_area)(const void *, size_t, int); + void (*dma_inv_range)(const void *, const void *); + void (*dma_clean_range)(const void *, const void *); void (*dma_flush_range)(const void *, const void *); }; @@ -140,6 +157,8 @@ extern struct cpu_cache_fns cpu_cache; * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ +#define dmac_inv_range cpu_cache.dma_inv_range +#define dmac_clean_range cpu_cache.dma_clean_range #define dmac_flush_range cpu_cache.dma_flush_range #else @@ -159,6 +178,8 @@ extern void __cpuc_flush_dcache_area(void *, size_t); * is visible to DMA, or data written by DMA to system memory is * visible to the CPU. */ +extern void dmac_inv_range(const void *, const void *); +extern void dmac_clean_range(const void *, const void *); extern void dmac_flush_range(const void *, const void *); #endif |