diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-07-02 22:53:37 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-02 22:53:37 +0200 |
| commit | df7cb455850351aa2793ffb41f6a2dcaefd83d9b (patch) | |
| tree | 374f84ee13239586a6754be3cab60e81bfe7ddeb /Documentation | |
| parent | 6887a4131da3adaab011613776d865f4bcfb5678 (diff) | |
| parent | c4b68520dc0ec96153bc0d87bca5ffba508edfcf (diff) | |
Merge tag 'at91-for-next-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Nicolas Ferre <nicolas.ferre@atmel.com> writes:
A series about interrupt controller cleanup. AT91 AIC is moving to
fasteoi type of handler and sparse IRQ.
The Device Tree support is added to take into account priority
and external IRQ.
In addition to that, the new AIC5 IP is introduced.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'at91-for-next-cleanup' of git://github.com/at91linux/linux-at91:
ARM: at91: add AIC5 support
ARM: at91: remove mach/irqs.h
ARM: at91: sparse irq support
ARM: at91: at91 based machines specify their own irq handler at run time
ARM: at91: remove static irq priorities for sam9x5
ARM: at91: add of irq priorities support
ARM: at91: aic add dt support for external irqs
ARM: at91: aic can use fast eoi handler type
ARM: at91: fix at91_aic_write macro
ARM: at91: remove two unused headers
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-aic.txt | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt index aabca4f83402..19078bf5cca8 100644 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt @@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,<chip>-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags: @@ -14,7 +14,10 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). - reg: Should contain AIC registers location and length +- atmel,external-irqs: u32 array of external irqs. Examples: /* @@ -24,7 +27,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0xfffff000 0x200>; }; @@ -34,5 +37,5 @@ Examples: dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 5>; }; |