summaryrefslogtreecommitdiff
path: root/Documentation
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2013-09-27 13:24:10 -0600
committerBjorn Helgaas <bhelgaas@google.com>2013-09-27 13:24:10 -0600
commitd95d3d53c7ef85ec0dc87db63aece18212c337b0 (patch)
treeb448db270fe34b5cb41120a909b1d54488d100ce /Documentation
parent645e40f9c4c7b905843e4a8968e1136ee34e0206 (diff)
parentbb38919ec56e0758c3ae56dfc091dcde1391353e (diff)
Merge branch 'pci/host-imx6' into next
* pci/host-imx6: PCI: imx6: Add support for i.MX6 PCIe controller ARM: imx6q: Add PCIe bits to GPR syscon definition
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/designware-pcie.txt7
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index eabcb4b5db6e..dd8d920bcbd6 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -3,7 +3,7 @@
Required properties:
- compatible: should contain "snps,dw-pcie" to identify the
core, plus an identifier for the specific instance, such
- as "samsung,exynos5440-pcie".
+ as "samsung,exynos5440-pcie" or "fsl,imx6q-pcie".
- reg: base addresses and lengths of the pcie controller,
the phy controller, additional register for the phy controller.
- interrupts: interrupt values for level interrupt,
@@ -21,6 +21,11 @@ Required properties:
- num-lanes: number of lanes to use
- reset-gpio: gpio pin number of power good signal
+Optional properties for fsl,imx6q-pcie
+- power-on-gpio: gpio pin number of power-enable signal
+- wake-up-gpio: gpio pin number of incoming wakeup signal
+- disable-gpio: gpio pin number of outgoing rfkill/endpoint disable signal
+
Example:
SoC specific DT Entry: