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| author | Prashanth Bhatta <bhattap@qca.qualcomm.com> | 2015-07-09 20:03:23 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2015-07-13 07:09:04 -0700 |
| commit | ffbf50bca32b2ba44397d94f2e928b7643f0ef4d (patch) | |
| tree | 68a6596c9dd9e1d15f0fbdb867b63b07989c9d0a | |
| parent | f1874d53bfeb9639a5ffc8018f896e6ecabc978b (diff) | |
qcacld: hif: Enable BME while resuming
While suspending, pci_disable_device is called to disable the
device which even disables bus master. During resume,
pci_enable_device is called but it doesn't enable bus master.
When bus master is disabled, PCIe is not entering L1ss after
Runtime Resume. Fix the L1ss issue by enabling bus master using
pci_set_master API.
Change-Id: I8f308b969d128631bb4a010f6072c71d06cb1c09
CRs-fixed: 867537
| -rw-r--r-- | CORE/SERVICES/HIF/PCIe/if_pci.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/CORE/SERVICES/HIF/PCIe/if_pci.c b/CORE/SERVICES/HIF/PCIe/if_pci.c index bd5f64787193..93c14fe66e3a 100644 --- a/CORE/SERVICES/HIF/PCIe/if_pci.c +++ b/CORE/SERVICES/HIF/PCIe/if_pci.c @@ -2374,6 +2374,9 @@ __hif_pci_resume(struct pci_dev *pdev, bool runtime_pm) pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); } + /* Set bus master bit in PCI_COMMAND to enable DMA */ + pci_set_master(pdev); + printk("\n%s: Rome PS: %d", __func__, val); #ifdef CONFIG_CNSS |
