diff options
| author | Dhoat Harpal <hdhoat@codeaurora.org> | 2016-06-27 18:20:23 +0530 |
|---|---|---|
| committer | Dhoat Harpal <hdhoat@codeaurora.org> | 2016-07-22 17:15:57 +0530 |
| commit | fc9dc4a439655c9318810d819cb4e4df60faebe7 (patch) | |
| tree | 85c6531d811fe82cc617386683069b4ce7adedc3 | |
| parent | 63ef0b4134426997567c3c8385c14f06dfb140b9 (diff) | |
ARM: dts: msm: Add IPC Router devices for MSMFALCON
The IPC Router devices define the topology for high-level interprocessor
communication within the SoC.
CRs-Fixed: 1043377
Change-Id: I565c7c6323a129c4f29c8da5c3e8719121f1109d
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index c7a5518f2be6..2a944d759058 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -395,4 +395,39 @@ qcom,glinkpkt-dev-name = "smdcntl8"; }; }; + + qcom,ipc_router { + compatible = "qcom,ipc_router"; + qcom,node-id = <1>; + }; + + qcom,ipc_router_modem_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "mpss"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; + + qcom,ipc_router_q6_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "lpass"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; + + qcom,ipc_router_cdsp_xprt { + compatible = "qcom,ipc_router_glink_xprt"; + qcom,ch-name = "IPCRTR"; + qcom,xprt-remote = "cdsp"; + qcom,glink-xprt = "smem"; + qcom,xprt-linkid = <1>; + qcom,xprt-version = <1>; + qcom,fragmented-data; + }; }; |