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| author | Linux Build Service Account <lnxbuild@localhost> | 2017-03-06 22:43:38 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-03-06 22:43:38 -0800 |
| commit | fb2e8b97faed615ec52f766dc8e210066d43806a (patch) | |
| tree | 583f2130227d7518d15fea8cfe8c6b2f34480981 | |
| parent | f3ecd0234359a8a9e64aca69e941ebb981afbcb0 (diff) | |
| parent | 888f9aacd0f0761b0e86401fe3cfc46292ff2f80 (diff) | |
Merge "clk: qcom: Update the source clock for 24MHz MCLK"
| -rw-r--r-- | drivers/clk/qcom/mmcc-sdm660.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c index 87e6f8c6be0a..0bf7ef05ed06 100644 --- a/drivers/clk/qcom/mmcc-sdm660.c +++ b/drivers/clk/qcom/mmcc-sdm660.c @@ -1041,7 +1041,7 @@ static const struct freq_tbl ftbl_mclk0_clk_src[] = { F(9600000, P_CXO, 2, 0, 0), F(16666667, P_GPLL0_OUT_MAIN_DIV, 2, 1, 9), F(19200000, P_CXO, 1, 0, 0), - F(24000000, P_GPLL0_OUT_MAIN_DIV, 1, 2, 25), + F(24000000, P_MMPLL10_PLL_OUT_MAIN, 1, 1, 24), F(33333333, P_GPLL0_OUT_MAIN_DIV, 1, 1, 9), F(48000000, P_GPLL0_OUT_MAIN, 1, 2, 25), F(66666667, P_GPLL0_OUT_MAIN, 1, 1, 9), |