diff options
| author | Casey Piper <cpiper@codeaurora.org> | 2015-04-28 15:23:18 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:41:55 -0700 |
| commit | f14ca4d5d02dd805e9dec5290b6100fb1962ee3b (patch) | |
| tree | ea16ebf6ce727d79d591c6c86e7d09be6818e1c4 | |
| parent | 8837f78417259383cee2ad83e09472cc18a8ac7b (diff) | |
msm: mdss: hdmi: determine where HDCP keys are stored
Determine if the HDCP keys are stored in software
registers or hardware fuses on supported hardware.
Change-Id: I9492a458c38aaea4303d3387d79c01bb9beb3219
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_hdmi_tx.c | 11 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_hdmi_util.h | 4 |
2 files changed, 15 insertions, 0 deletions
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.c b/drivers/video/fbdev/msm/mdss_hdmi_tx.c index 06b86f31633d..34d04b805fd1 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_tx.c +++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.c @@ -1429,6 +1429,17 @@ static int hdmi_tx_check_capability(struct hdmi_tx_ctrl *hdmi_ctrl) QFPROM_RAW_FEAT_CONFIG_ROW0_LSB + QFPROM_RAW_VERSION_4); hdcp_disabled = reg_val & BIT(12); hdmi_disabled = reg_val & BIT(13); + reg_val = DSS_REG_R_ND(io, SEC_CTRL_HW_VERSION); + /* + * With HDCP enabled on HDCP 2.2 capable hardware, check if HW + * or SW keys should be used. If using SW keys, disable HDCP 1.4 + */ + if (!hdcp_disabled && (reg_val >= HDCP_SEL_MIN_SEC_VERSION)) { + reg_val = DSS_REG_R_ND(io, + QFPROM_RAW_FEAT_CONFIG_ROW0_MSB + + QFPROM_RAW_VERSION_4); + hdcp_disabled = !(reg_val & BIT(23)); + } } DEV_DBG("%s: Features <HDMI:%s, HDCP:%s>\n", __func__, diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.h b/drivers/video/fbdev/msm/mdss_hdmi_util.h index 5297e0e50e67..2d9b007d8cd2 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_util.h +++ b/drivers/video/fbdev/msm/mdss_hdmi_util.h @@ -243,10 +243,14 @@ #define QFPROM_RAW_FEAT_CONFIG_ROW0_LSB (0x000000F8) #define QFPROM_RAW_FEAT_CONFIG_ROW0_MSB (0x000000FC) #define QFPROM_RAW_VERSION_4 (0x000000A8) +#define SEC_CTRL_HW_VERSION (0x00006000) #define HDCP_KSV_LSB (0x000060D8) #define HDCP_KSV_MSB (0x000060DC) #define HDCP_KSV_VERSION_4_OFFSET (0x00000014) +/* SEC_CTRL version that supports HDCP SEL */ +#define HDCP_SEL_MIN_SEC_VERSION (0x50010000) + #define TOP_AND_BOTTOM 0x10 #define FRAME_PACKING 0x20 #define SIDE_BY_SIDE_HALF 0x40 |