summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAmit Nischal <anischal@codeaurora.org>2016-06-08 15:48:08 +0530
committerKyle Yan <kyan@codeaurora.org>2016-06-16 15:24:38 -0700
commitebdfa88580493c9f1259cf25c318548599845ada (patch)
tree379ca01009a8ddb97003511177adea9cb60d1214
parent22f7684298ea457b964a7a95474c82d462583b8b (diff)
clk: qcom: gcc-msm8996: Add missing BCR for USB3 and PCIE clocks
The block reset registers for USB3 and PCIE will be required by the clients to reset their subsystem blocks so add them in the reset map. Change-Id: Ie30158592fca057454152f3f46a5d8b89ae36b88 Signed-off-by: Amit Nischal <anischal@codeaurora.org>
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c4
-rw-r--r--include/dt-bindings/clock/qcom,gcc-msm8996.h4
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index edcb2c616d31..a63680290219 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -3435,6 +3435,10 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = {
[GCC_MSMPU_BCR] = { 0x8d000 },
[GCC_MSS_Q6_BCR] = { 0x8e000 },
[GCC_QREFS_VBG_CAL_BCR] = { 0x88020 },
+ [GCC_USB3_PHY_BCR] = { 0x50020 },
+ [GCC_USB3PHY_PHY_BCR] = { 0x50024 },
+ [GCC_PCIE_PHY_NOCSR_COM_PHY_BCR] = { 0x6F00C },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6F014 },
};
static const struct regmap_config gcc_msm8996_regmap_config = {
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h
index 5e1635218ab0..3819485dead3 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8996.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h
@@ -335,6 +335,10 @@
#define GCC_MSMPU_BCR 98
#define GCC_MSS_Q6_BCR 99
#define GCC_QREFS_VBG_CAL_BCR 100
+#define GCC_USB3_PHY_BCR 101
+#define GCC_USB3PHY_PHY_BCR 102
+#define GCC_PCIE_PHY_NOCSR_COM_PHY_BCR 103
+#define GCC_PCIE_PHY_COM_BCR 104
/* Indexes for GDSCs */
#define AGGRE0_NOC_GDSC 0