diff options
| author | Varun Sethi <Varun.Sethi@freescale.com> | 2014-10-06 11:28:00 +0100 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 11:12:01 -0700 |
| commit | e8ecda16e05a6f1002c5673c9b8b80ed7d50f9d2 (patch) | |
| tree | 35294d31b57148ccf3ce8762dbc6fba5beb45910 | |
| parent | aa92e1c073ad4e6362ad6803221578e79a92b852 (diff) | |
Add support of the IOMMU_DEVICE flag.
This flag is used for specifying access to device memory. SMMU would apply
device memory attributes for a DMA transaction. This is required for setting
access to GIC registers, for generating message interrupts. This would ensure that
transactions targetting device memory are not gathered or reordered.
CRs-Fixed: 792402
Change-Id: Ief623e16e4f2dfc99ef6745459777269f1ab7ac6
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Patch-mainline: iommu @ 10/06/14 @ 10:28
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
| -rw-r--r-- | drivers/iommu/arm-smmu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 8e3d25298476..0e83850e15ec 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1690,6 +1690,10 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain, if (prot & IOMMU_CACHE) pteval |= (MAIR_ATTR_IDX_CACHE << ARM_SMMU_PTE_ATTRINDX_SHIFT); + + if (prot & IOMMU_DEVICE) + pteval |= (MAIR_ATTR_IDX_DEV << + ARM_SMMU_PTE_ATTRINDX_SHIFT); } else { pteval |= ARM_SMMU_PTE_HAP_FAULT; if (prot & IOMMU_READ && !(prot & IOMMU_PRIV)) @@ -1700,6 +1704,9 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain, pteval |= ARM_SMMU_PTE_MEMATTR_OIWB; else pteval |= ARM_SMMU_PTE_MEMATTR_NC; + + if (prot & IOMMU_DEVICE) + pteval |= ARM_SMMU_PTE_MEMATTR_DEV; } /* If no access, create a faulting entry to avoid TLB fills */ |