diff options
| author | Ryan Hsu <ryanhsu@qca.qualcomm.com> | 2014-06-05 12:30:38 -0700 |
|---|---|---|
| committer | Pitani Venkata Rajesh Kumar <c_vpitan@qti.qualcomm.com> | 2014-07-02 18:15:36 +0530 |
| commit | e8673e86fd697245fc63c41131f7d675da252e06 (patch) | |
| tree | 90273aaddb93a537b9239eec9f7aa183f3c8740d | |
| parent | dc015788729f5f01821045361dcd42eec12aed1e (diff) | |
qcacld: dfs: adjust the dfs pulse pattern
- clean up indendation
- decrease the pulse matching criteria to increase the hit rate
- remove the default hard code pulse marco, move them to ini for
flexibility
- both FCC/MKK4 type2/3/4 radar pattern is short, adjust the
dfs pules to increase the hit rate
Change-Id: I6ac8d541dc4a13bb793ac4546e5e2c820ca86d7f
CRs-fixed: 676168
| -rw-r--r-- | CORE/SERVICES/DFS/inc/radar_filters.h | 14 | ||||
| -rw-r--r-- | CORE/SERVICES/DFS/src/dfs.c | 84 | ||||
| -rw-r--r-- | CORE/SERVICES/DFS/src/dfs_process_radarevent.c | 36 |
3 files changed, 64 insertions, 70 deletions
diff --git a/CORE/SERVICES/DFS/inc/radar_filters.h b/CORE/SERVICES/DFS/inc/radar_filters.h index b84427529521..4ab74188b656 100644 --- a/CORE/SERVICES/DFS/inc/radar_filters.h +++ b/CORE/SERVICES/DFS/inc/radar_filters.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2013 The Linux Foundation. All rights reserved. + * Copyright (c) 2011-2014 The Linux Foundation. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * @@ -69,13 +69,13 @@ struct dfs_pulse dfs_fcc_radars[] = { {9, 1, 3003, 3003, 1, 7, 5, 0, 1, 18, 0, 0, 1, 1}, // FCC TYPE 2 - {23, 5, 4347, 6666, 0, 18, 11, 0, 7, 22, 0, 3, 0, 2}, + {23, 5, 4347, 6666, 0, 18, 8, 0, 7, 22, 0, 3, 0, 2}, // FCC TYPE 3 - {18, 10, 2000, 5000, 0, 23, 8, 6, 13, 22, 0, 3, 0, 5}, + {18, 10, 2000, 5000, 0, 23, 6, 6, 13, 22, 0, 3, 0, 5}, // FCC TYPE 4 - {16, 15, 2000, 5000, 0, 25, 7, 11, 23, 22, 0, 3, 0, 11}, + {16, 15, 2000, 5000, 0, 25, 5, 11, 23, 22, 0, 3, 0, 11}, }; struct dfs_pulse dfs_mkk4_radars[] = { @@ -99,13 +99,13 @@ struct dfs_pulse dfs_mkk4_radars[] = { {9, 1, 3003, 3003, 1, 7, 5, 0, 1, 18, 0, 0, 1, 1}, // FCC TYPE 2 - {23, 5, 4347, 6666, 0, 18, 11, 0, 7, 22, 0, 3, 0, 2}, + {23, 5, 4347, 6666, 0, 18, 8, 0, 7, 22, 0, 3, 0, 2}, // FCC TYPE 3 - {18, 10, 2000, 5000, 0, 23, 8, 6, 13, 22, 0, 3, 0, 5}, + {18, 10, 2000, 5000, 0, 23, 6, 6, 13, 22, 0, 3, 0, 5}, // FCC TYPE 4 - {16, 15, 2000, 5000, 0, 25, 7, 11, 23, 22, 0, 3, 0, 11}, + {16, 15, 2000, 5000, 0, 25, 5, 11, 23, 22, 0, 3, 0, 11}, }; struct dfs_bin5pulse dfs_fcc_bin5pulses[] = { diff --git a/CORE/SERVICES/DFS/src/dfs.c b/CORE/SERVICES/DFS/src/dfs.c index 97b17ccf203f..fa05f5b4b5ad 100644 --- a/CORE/SERVICES/DFS/src/dfs.c +++ b/CORE/SERVICES/DFS/src/dfs.c @@ -583,51 +583,47 @@ int dfs_radar_enable(struct ieee80211com *ic, if (ext_ch) { rs_ext = dfs_getchanstate(dfs, &index_ext, 1); } - if (rs_pri != NULL && ((ext_ch==NULL)||(rs_ext != NULL))) { - struct ath_dfs_phyerr_param pe; - - OS_MEMSET(&pe, '\0', sizeof(pe)); - - if (index_pri != dfs->dfs_curchan_radindex) - dfs_reset_alldelaylines(dfs); - - dfs->dfs_curchan_radindex = (int16_t) index_pri; - - if (rs_ext) - dfs->dfs_extchan_radindex = (int16_t) index_ext; - - ath_dfs_phyerr_param_copy(&pe, - &rs_pri->rs_param); - DFS_DPRINTK(dfs, ATH_DEBUG_DFS3, - "%s: firpwr=%d, rssi=%d, height=%d, " - "prssi=%d, inband=%d, relpwr=%d, " - "relstep=%d, maxlen=%d\n", - __func__, - pe.pe_firpwr, - pe.pe_rrssi, - pe.pe_height, - pe.pe_prssi, - pe.pe_inband, - pe.pe_relpwr, - pe.pe_relstep, - pe.pe_maxlen - ); - -#if 0 //Not needed - /* Disable strong signal fast antenna diversity */ - ath_hal_setcapability(ah, HAL_CAP_DIVERSITY, - HAL_CAP_STRONG_DIV, 1, NULL); -#endif - ic->ic_dfs_enable(ic, &is_fastclk, &pe); - DFS_DPRINTK(dfs, ATH_DEBUG_DFS, "Enabled radar detection on channel %d\n", - chan->ic_freq); - dfs->dur_multiplier = - is_fastclk ? DFS_FAST_CLOCK_MULTIPLIER : DFS_NO_FAST_CLOCK_MULTIPLIER; - DFS_DPRINTK(dfs, ATH_DEBUG_DFS3, - "%s: duration multiplier is %d\n", __func__, dfs->dur_multiplier); + if (rs_pri != NULL && ((ext_ch==NULL)||(rs_ext != NULL))) { + struct ath_dfs_phyerr_param pe; + + OS_MEMSET(&pe, '\0', sizeof(pe)); + + if (index_pri != dfs->dfs_curchan_radindex) + dfs_reset_alldelaylines(dfs); + + dfs->dfs_curchan_radindex = (int16_t) index_pri; + dfs->dfs_pri_multiplier_ini = radar_info->dfs_pri_multiplier; + + if (rs_ext) + dfs->dfs_extchan_radindex = (int16_t) index_ext; + + ath_dfs_phyerr_param_copy(&pe, + &rs_pri->rs_param); + DFS_DPRINTK(dfs, ATH_DEBUG_DFS3, + "%s: firpwr=%d, rssi=%d, height=%d, " + "prssi=%d, inband=%d, relpwr=%d, " + "relstep=%d, maxlen=%d\n", + __func__, + pe.pe_firpwr, + pe.pe_rrssi, + pe.pe_height, + pe.pe_prssi, + pe.pe_inband, + pe.pe_relpwr, + pe.pe_relstep, + pe.pe_maxlen + ); + + ic->ic_dfs_enable(ic, &is_fastclk, &pe); + DFS_DPRINTK(dfs, ATH_DEBUG_DFS, "Enabled radar detection on channel %d\n", + chan->ic_freq); + dfs->dur_multiplier = + is_fastclk ? DFS_FAST_CLOCK_MULTIPLIER : DFS_NO_FAST_CLOCK_MULTIPLIER; + DFS_DPRINTK(dfs, ATH_DEBUG_DFS3, + "%s: duration multiplier is %d\n", __func__, dfs->dur_multiplier); } else - DFS_DPRINTK(dfs, ATH_DEBUG_DFS, "%s: No more radar states left\n", - __func__); + DFS_DPRINTK(dfs, ATH_DEBUG_DFS, "%s: No more radar states left\n", + __func__); } } diff --git a/CORE/SERVICES/DFS/src/dfs_process_radarevent.c b/CORE/SERVICES/DFS/src/dfs_process_radarevent.c index 1d05811f9a7f..1154ee82bf40 100644 --- a/CORE/SERVICES/DFS/src/dfs_process_radarevent.c +++ b/CORE/SERVICES/DFS/src/dfs_process_radarevent.c @@ -65,8 +65,6 @@ #define FREQ_5500_MHZ 5500 #define DFS_MAX_FREQ_SPREAD 1375 * 1 -#define DFS_LARGE_PRI_MULTIPLIER 4 -#define DFS_W53_DEFAULT_PRI_MULTIPLIER 2 static char debug_dup[33]; static int debug_dup_cnt; @@ -179,30 +177,30 @@ dfs_process_radarevent(struct ath_dfs *dfs, struct ieee80211_channel *chan) (dfs->dfs_caps.ath_chip_is_bb_tlv) && (chan->ic_freq < FREQ_5500_MHZ)) { - dfs->dfs_pri_multiplier = DFS_W53_DEFAULT_PRI_MULTIPLIER; - /* do not process W53 pulses unless we have a minimum number of them */ + dfs->dfs_pri_multiplier = dfs->dfs_pri_multiplier_ini; + + /* do not process W53 pulses, + unless we have a minimum number of them + */ if (dfs->dfs_phyerr_w53_counter >= 5) { - /* - for chips that support frequency information, we can - relax PRI restriction if the frequency - spread is narrow. - */ - if ((dfs->dfs_phyerr_freq_max - dfs->dfs_phyerr_freq_min) < DFS_MAX_FREQ_SPREAD) { - dfs->dfs_pri_multiplier = DFS_LARGE_PRI_MULTIPLIER; - } - DFS_DPRINTK(dfs, ATH_DEBUG_DFS1, "%s: w53_counter=%d, freq_max=%d, freq_min=%d, pri_multiplier=%d", - __func__, - dfs->dfs_phyerr_w53_counter, - dfs->dfs_phyerr_freq_max, - dfs->dfs_phyerr_freq_min, - dfs->dfs_pri_multiplier); + DFS_DPRINTK(dfs, ATH_DEBUG_DFS1, + "%s: w53_counter=%d, freq_max=%d, " + "freq_min=%d, pri_multiplier=%d", + __func__, + dfs->dfs_phyerr_w53_counter, + dfs->dfs_phyerr_freq_max, + dfs->dfs_phyerr_freq_min, + dfs->dfs_pri_multiplier); dfs->dfs_phyerr_freq_min = 0x7fffffff; dfs->dfs_phyerr_freq_max = 0; } else { return 0; } } - DFS_DPRINTK(dfs, ATH_DEBUG_DFS1, "%s: pri_multiplier=%d", __func__, dfs->dfs_pri_multiplier); + DFS_DPRINTK(dfs, ATH_DEBUG_DFS1, + "%s: pri_multiplier=%d", + __func__, + dfs->dfs_pri_multiplier); ATH_DFSQ_LOCK(dfs); empty = STAILQ_EMPTY(&(dfs->dfs_radarq)); |
